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[60.250.196.139]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2d04b120f2fsm33679845ad.64.2026.08.03.00.49.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Aug 2026 00:49:27 -0700 (PDT) From: Chi-Wen Weng To: broonie@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, cwweng@nuvoton.com, cwweng.linux@gmail.com Subject: [PATCH v3 0/2] spi: ma35d1-qspi: Enable GPIO chip-select support Date: Mon, 3 Aug 2026 15:49:11 +0800 Message-Id: <20260803074913.1656675-1-cwweng.linux@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <5769eae0-1b40-419f-8311-0d919bf619fa@sirena.org.uk> References: <5769eae0-1b40-419f-8311-0d919bf619fa@sirena.org.uk> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Chi-Wen Weng The generic SPI controller binding allows GPIO-based chip selects, but the MA35D1 QSPI driver currently supports only the controller's two native chip selects. This series enables GPIO descriptor-based chip-select handling in the driver and updates the binding so that num-cs can describe the total number of native and GPIO chip selects. Patch 1 removes the native hardware limit from the binding's num-cs property. Patch 2 enables GPIO chip selects in the driver while retaining the hardware limit of two native chip selects. Changes in v3: * Split the binding and driver changes into a two-patch series. * Allow num-cs to exceed the two native chip selects when GPIO chip selects are present. * Remove the driver's upper limit of two from num-cs. * Rename the native chip-select limit for clarity. * Reject out-of-range native chip-select indices in the setup callback. * Retain active-high support for GPIO chip selects only. Changes in v2: * Enable GPIO descriptor-based chip-select handling in the driver instead of disallowing cs-gpios in the binding. * Set the maximum number of native chip selects to two. * Reject active-high polarity only for native chip selects. Chi-Wen Weng (2): dt-bindings: spi: nuvoton,ma35d1-qspi: Allow additional GPIO chip selects spi: ma35d1-qspi: Enable GPIO chip selects .../bindings/spi/nuvoton,ma35d1-qspi.yaml | 1 - drivers/spi/spi-ma35d1-qspi.c | 32 ++++++++++++++++--- 2 files changed, 28 insertions(+), 5 deletions(-) -- 2.25.1