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([129.227.183.200]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-cbe8f19634dsm108940a12.7.2026.08.06.22.32.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 06 Aug 2026 22:32:45 -0700 (PDT) From: "Yuhang.chen" To: anup@brainfault.org Cc: atish.patra@linux.dev, palmer@dabbelt.com, pjw@kernel.org, aou@eecs.berkeley.edu, alex@ghiti.fr, pbonzini@redhat.com, shuah@kernel.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, zhouquan@iscas.ac.cn, "Yuhang.chen" Subject: [PATCH v2 0/2] RISC-V: KVM: Add PMU event filter support Date: Fri, 7 Aug 2026 13:32:25 +0800 Message-Id: <20260807053227.341700-1-yhchen312@gmail.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This series adds PMU event filter support to RISC-V KVM, allowing a userspace VMM to restrict which SBI PMU events a guest is permitted to program. The KVM_SET_PMU_EVENT_FILTER ioctl and KVM_CAP_PMU_EVENT_FILTER already exist as generic KVM uAPI (include/uapi/linux/kvm.h); RISC-V KVM does not yet implement them. Wiring them up lets a VMM limit a guest's PMU event access, which is useful for sandboxing and for withholding host PMU events the host does not intend to expose. Patch 1 implements the kernel side: the uapi struct, the ioctl handler with an SRCU-protected filter, enforcement in kvm_riscv_vcpu_pmu_ctr_cfg_match() (a disallowed event fails with SBI_ERR_NOT_SUPPORTED), and advertisement of KVM_CAP_PMU_EVENT_FILTER. Like the other arch-specific KVM uAPI structs, struct kvm_pmu_event_filter is defined per-architecture; its layout reflects RISC-V PMU events and the ioctl number encodes the struct size. Patch 2 adds a selftest that covers the ALLOW/DENY semantics with the event in and out of the list, filter clearing, and ioctl argument rejection (EINVAL/E2BIG). Testing: built and run under QEMU TCG with nested KVM (an L1 KVM host running an L2 guest). The selftest (patch 2) passes and dmesg stays clean throughout the run. Based on v7.2-rc2 (a635d6748234). Changes in v2: - Mask reserved high bits of the SBI PMU event index before comparing against the filter, so a guest cannot bypass a DENY filter by setting bits above bit 19. Noted by sashiko-bot review. - Reject non-zero pad in the ioctl argument to keep the field usable for future extensions. Assisted-by: YuanSheng:deepseek-v4-pro Co-developed-by: Quan Zhou Signed-off-by: Quan Zhou Signed-off-by: Yuhang.chen Yuhang.chen (2): RISC-V: KVM: Add PMU event filter support RISC-V: KVM: selftests: Add PMU event filter test arch/riscv/include/asm/kvm_host.h | 3 + arch/riscv/include/uapi/asm/kvm.h | 20 ++ arch/riscv/kvm/vcpu_pmu.c | 31 +++ arch/riscv/kvm/vm.c | 69 +++++- tools/testing/selftests/kvm/Makefile.kvm | 1 + .../kvm/riscv/pmu_event_filter_test.c | 199 ++++++++++++++++++ 6 files changed, 322 insertions(+), 1 deletion(-) create mode 100644 tools/testing/selftests/kvm/riscv/pmu_event_filter_test.c -- 2.34.1