From: Ivan Vecera <ivecera@redhat.com>
To: netdev@vger.kernel.org
Cc: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>,
Jakub Kicinski <kuba@kernel.org>, Jiri Pirko <jiri@resnulli.us>,
Min Li <min.li@microchip.com>, Paolo Abeni <pabeni@redhat.com>,
Petr Oros <poros@redhat.com>,
Richard Cochran <richardcochran@gmail.com>,
Vadim Fedorenko <vadim.fedorenko@linux.dev>,
linux-kernel@vger.kernel.org
Subject: [PATCH net-next v5 1/3] dpll: zl3073x: scale poll interval proportionally to timeout
Date: Fri, 7 Aug 2026 11:58:24 +0200 [thread overview]
Message-ID: <20260807095826.386756-2-ivecera@redhat.com> (raw)
In-Reply-To: <20260807095826.386756-1-ivecera@redhat.com>
Replace the fixed 10 us poll sleep in zl3073x_poll_zero_u8() with
timeout_us / 50. This scales the sleep interval proportionally to
the timeout, targeting approximately 50 iterations regardless of
the timeout magnitude.
The fixed 10 us interval was adequate for the existing 25-50 ms
timeouts but wasteful for the longer PTP-related timeouts (up to
3000 ms for phase step) added in the following patches, where it
would generate on the order of 10^5 bus transactions per wait.
Signed-off-by: Ivan Vecera <ivecera@redhat.com>
---
drivers/dpll/zl3073x/core.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/dpll/zl3073x/core.c b/drivers/dpll/zl3073x/core.c
index 5b2d77f2c2288e..2e8b52c8de5e26 100644
--- a/drivers/dpll/zl3073x/core.c
+++ b/drivers/dpll/zl3073x/core.c
@@ -322,7 +322,7 @@ int zl3073x_write_u48(struct zl3073x_dev *zldev, unsigned int reg, u64 val)
int zl3073x_poll_zero_u8(struct zl3073x_dev *zldev, unsigned int reg,
u8 mask, unsigned int timeout_us)
{
-#define ZL_POLL_SLEEP_US 10
+ unsigned int sleep_us = timeout_us / 50;
unsigned int val;
/* Check the register is 8bit */
@@ -336,7 +336,7 @@ int zl3073x_poll_zero_u8(struct zl3073x_dev *zldev, unsigned int reg,
reg = ZL_REG_ADDR(reg) + ZL_RANGE_OFFSET;
return regmap_read_poll_timeout(zldev->regmap, reg, val, !(val & mask),
- ZL_POLL_SLEEP_US, timeout_us);
+ sleep_us, timeout_us);
}
int zl3073x_mb_op(struct zl3073x_dev *zldev, unsigned int op_reg, u8 op_val,
--
2.54.0
next prev parent reply other threads:[~2026-08-07 9:58 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-07 9:58 [PATCH net-next v5 0/3] dpll: zl3073x: add PTP clock support Ivan Vecera
2026-08-07 9:58 ` Ivan Vecera [this message]
2026-08-07 9:58 ` [PATCH net-next v5 2/3] dpll: zl3073x: add channel ToD, phase step and TIE operations Ivan Vecera
2026-08-07 9:58 ` [PATCH net-next v5 3/3] dpll: zl3073x: add PTP clock support Ivan Vecera
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