From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 99EEC2417D9; Sun, 9 Aug 2026 13:15:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786281321; cv=none; b=Qr7E1WvAZHV8QmN2ZBFM8IMBlZrN01JW6qCGPtbtHTTQIa06HDQvpHy3HA6LKpOB6M8yXLF0Qqy1aiZqqRaERMMXNg9KuUIZUyuCaU2Ifux7IEAC79isdVjeD0YujRUHpaTem16s93zHwfmZdCAaHc7bIxt2zqvjG0Hbj8w/6H8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786281321; c=relaxed/simple; bh=9peFgrnHqlLJn8Ue7sGrY5PiSn7KpFqxvAykcmftCp8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Q+AW2JnfcwWhHmaXAbSwhlS2uvhN8mHPPuRXwdCNvIxikk8xUPACgJwik5RdkCtRob6NSOk5THPw8sSHeV+Vus6OTjqpp9qFLptghlfF0QDucAp3mSBOFHHYu1HDKBIE9OWjqz7smkO1K4g3qSSCLC4TBInPZSuipDvEQzLWWaU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=VaDtLmzB; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="VaDtLmzB" Received: by smtp.kernel.org (Postfix) with ESMTPS id 62849C2BD05; Sun, 9 Aug 2026 13:15:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1786281320; bh=9peFgrnHqlLJn8Ue7sGrY5PiSn7KpFqxvAykcmftCp8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=VaDtLmzBLiMCHaK7iB/0prE+fswjBrAjperEeS8++CktfySTSqr1icijjETkqoUd+ e8qWZiF60I32xao/6FPEhKpubjodK5H4nCbone3/+HnfNquDIyH2T+kdHPJSyyWBS1 Og66F/uEoP7t9rBnChSfL1UR+Gk878Hl6Wxiwz82/i5AmENeW1eZYOtvAkIYoRmZ/t srsWcj/V/kepMtegRPxRI5I2lJHEWiyD9NSLzD2vr0Uf9aEqCyQzrt7jyXjWZQOSNA jSi2c4Q0kU0JwmICxOGB/NdOynyLrjnxVv0+dh7+OuwEMh118TxZ1fj9BM32B0Dt20 yqgM1+jN6bmDA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 43741C5AD2C; Sun, 9 Aug 2026 13:15:20 +0000 (UTC) From: Cody Kang via B4 Relay Date: Sun, 09 Aug 2026 21:14:12 +0800 Subject: [PATCH v2 03/17] dt-bindings: display: spacemit: add K3 Innosilicon DP/eDP controller Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260809-k3-display-v2-3-327d7910bf71@gmail.com> References: <20260809-k3-display-v2-0-327d7910bf71@gmail.com> In-Reply-To: <20260809-k3-display-v2-0-327d7910bf71@gmail.com> To: David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Yixun Lan , Vinod Koul , Neil Armstrong , Haylen Chu , Michael Turquette , Stephen Boyd , Brian Masney , Philipp Zabel , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Yao Zi , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Guodong Xu Cc: dri-devel@lists.freedesktop.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, spacemit@lists.linux.dev, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-clk@vger.kernel.org, Cody Kang X-Mailer: b4 0.16.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1786281298; l=4802; i=codykang.hk@gmail.com; s=codykang; h=from:subject:message-id; bh=VkHwjITfjJFDv2SvE3j5UStndtyWrAWLVP3FHNwGNeE=; b=llT07l7DIsiM1lHB9+w0LQewfBUC5/hb1VcZ0hJjSrb8Ow6g31WJRK2i5vaKmSyMD124koK0Q K6KHDPcB+R9D74X0khdGbM21yXzK69ex/5hgwdfO70l2URTSLWsPGkr X-Developer-Key: i=codykang.hk@gmail.com; a=ed25519; pk=Osn6/cs9Su/mHHw4P19cmVc3v2FMQfiWahjsN0vEkuk= X-Endpoint-Received: by B4 Relay for codykang.hk@gmail.com/codykang with auth_id=895 X-Original-From: Cody Kang Reply-To: codykang.hk@gmail.com From: Cody Kang Both K3 instances are the same IP and share one compatible; which one behaves as eDP is decided by what its downstream port is wired to, not by which register window it sits in, so the binding does not distinguish them. Reviewed-by: Rob Herring (Arm) Signed-off-by: Cody Kang --- v2: - make port@1 required (Rob Herring) - add Reviewed-by: Rob Herring (Arm) --- .../display/spacemit/spacemit,k3-inno-dp.yaml | 141 +++++++++++++++++++++ 1 file changed, 141 insertions(+) diff --git a/Documentation/devicetree/bindings/display/spacemit/spacemit,k3-inno-dp.yaml b/Documentation/devicetree/bindings/display/spacemit/spacemit,k3-inno-dp.yaml new file mode 100644 index 0000000000000..491d25730da9f --- /dev/null +++ b/Documentation/devicetree/bindings/display/spacemit/spacemit,k3-inno-dp.yaml @@ -0,0 +1,141 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/spacemit/spacemit,k3-inno-dp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SpacemiT K3 Innosilicon DisplayPort / embedded DisplayPort Controller + +maintainers: + - Cody Kang + +description: + Innosilicon DisplayPort transmit controller integrated in the SpacemiT K3 + SoC. The K3 has two instances of the same block sharing one compatible; + each acts as embedded or external DisplayPort depending on whether its + output port drives a panel or a connector. + +properties: + compatible: + const: spacemit,k3-inno-dp + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + description: Link and hot-plug events. + + clocks: + items: + - description: Pixel clock for the controller. + - description: + Pixel clock generated by the DP PHY PLL; the pixel clock above is + parented onto it in use. + + clock-names: + items: + - const: pxclk + - const: pll + + resets: + maxItems: 1 + description: Controller-wide reset signal. + + phys: + maxItems: 1 + description: Phandle to the K3 Innosilicon DP PHY. + + phy-names: + items: + - const: dp + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: Video input from the DPU. + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: Output to the panel or to the DisplayPort connector. + + required: + - port@0 + - port@1 + + aux-bus: + $ref: /schemas/display/dp-aux-bus.yaml# + description: + The DisplayPort AUX bus. Present when the output drives an embedded + panel, which is described as a child of this node and identifies itself + over AUX. Absent when the output is a connector. + + phy: + $ref: /schemas/phy/spacemit,k3-inno-dp-phy.yaml# + description: + The DisplayPort PHY. Its registers live inside this controller's + register window, so it is described here as a child node. + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - resets + - phys + - phy-names + - ports + +additionalProperties: false + +examples: + - | + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + edp@cac84000 { + compatible = "spacemit,k3-inno-dp"; + reg = <0x0 0xcac84000 0x0 0x4000>; + interrupts = <132 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&syscon_apmu CLK_APMU_EDP0_PXCLK>, <&edp0_phy>; + clock-names = "pxclk", "pll"; + resets = <&syscon_apmu RESET_APMU_EDP0>; + phys = <&edp0_phy>; + phy-names = "dp"; + + edp0_phy: phy { + compatible = "spacemit,k3-inno-dp-phy"; + #phy-cells = <0>; + #clock-cells = <0>; + clock-output-names = "edp0_pll_pxclk"; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + endpoint { + remote-endpoint = <&dpu0_out>; + }; + }; + + port@1 { + reg = <1>; + endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; + }; + }; -- 2.43.0