[PATCH v2 0/2] selftests/resctrl: Increase L3 cache test coverage

[Richard Cheng <icheng@nvidia.com>]

The resctrl selftests check L3 cache isolation L3_CAT and occupancy
accuracy CMT, but some basic L3 behavior is untested. That CBM writes
are handle correctly and that info/L3/bit_usage reports allocations
correctly.

Add two self-contained tests for these. Each gates on the feature it
needs, so it runs wherever that feature exists and skips otherwise.
They were exercised on an arm64 MPAM platform.

Changes since v1:
- Drop L3_CAT_OCCUP because CMT already tests cache occupancy bounds.
- Rework L3_CAT_VALIDATE as L3_CBM_VALIDATE to check valid and invalid
  CBMs using cbm_mask and min_cbm_bits.
- Rework L3_BIT_USAGE to use valid partial allocations and simplify
  domain bit_usage parsing.


Running checkpatch.pl will have warning on patch 1 about string issue,
I've tweaked it for several times so I'll let you decide whether we
should decrease the message or leave it as is.


Richard Cheng (2):
  selftests/resctrl: Add L3_CBM_VALIDATE to check CBM writes
  selftests/resctrl: Add L3_BIT_USAGE to check allocation reporting

 tools/testing/selftests/resctrl/cat_test.c    | 285 ++++++++++++++++++
 tools/testing/selftests/resctrl/resctrl.h     |   2 +
 .../testing/selftests/resctrl/resctrl_tests.c |   2 +
 3 files changed, 289 insertions(+)


base-commit: 840ef6c78e6a2f694b578ecb9063241c992aaa9e
-- 
2.53.0