[PATCH v2 1/2] dt-bindings: phy: Add documentation for Airoha AN7583 USB PHY

[Christian Marangi <ansuelsmth@gmail.com>]

Add documentation for Airoha AN7583 USB PHY that describe the USB PHY
for the USB controller.

Airoha AN7583 SoC support a maximum of 2 USB port. The USB 2.0 mode is
always supported. The USB 3.0 mode is optional and depends on the Serdes
mode currently configured on the system for the relevant USB port.

To correctly calibrate, the USB 2.0 port require correct value in
"airoha,usb2-monitor-clk-sel" property. Both the 2 USB 2.0 port permit
selecting one of the 4 monitor clock for calibration (internal clock not
exposed to the system) but each port have only one of the 4 actually
connected in HW hence the correct value needs to be specified in DT
based on board and the physical port. Normally it's monitor clock 1 for
USB1 and monitor clock 2 for USB2.

To correctly setup the Serdes mode attached to the USB 3.0 mode, a phys
property is required with the phandle pointing to the correct Serdes port
provided by the SCU node. Providing the phys property is optional if USB
3.0 is not used.

The second USB PHY on Airoha AN7583 SoC is used for PCIe Gen2 usage and
similar to USB 3.0 require a phys property to configure the serdes.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
 .../bindings/phy/airoha,an7583-usb-phy.yaml   | 205 ++++++++++++++----
 1 file changed, 168 insertions(+), 37 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/airoha,an7583-usb-phy.yaml b/Documentation/devicetree/bindings/phy/airoha,an7583-usb-phy.yaml
index a6e2c0b1acc4..46b311040e02 100644
--- a/Documentation/devicetree/bindings/phy/airoha,an7583-usb-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/airoha,an7583-usb-phy.yaml
@@ -26,64 +26,195 @@ description: >
 
 properties:
   compatible:
-    const: airoha,an7583-usb-phy
+    enum:
+      - airoha,an7583-usb-phy
+      - airoha,an7583-pcie-phy
 
   reg:
-    items:
-      - description: phy register
-      - description: ana register
-      - description: pma register
-      - description: dig register
+    minItems: 3
+    maxItems: 4
 
   reg-names:
-    itmes:
-      const: phy
-      const: ana
-      const: pma
-      const: dif
+    minItems: 3
+    maxItems: 4
 
-  usb2-phy:
+  '#address-cells':
+    const: 1
+
+  '#size-cells':
+    const: 0
+
+  usb3-phy:
     type: object
 
     properties:
-      reg: [0, 0x1000]
+      phys:
+        items:
+          - description: phandle to Serdes PHY
 
-    airoha,usb2-monitor-clk-sel:
-      description: Describe what oscillator across the available 4
-        should be selected for USB 2.0 Slew Rate calibration.
-      $ref: /schemas/types.yaml#/definitions/uint32
-      enum: [0, 1, 2, 3]
+      '#phy-cells':
+        description: The cell contains the mode, PHY_TYPE_USB2 or PHY_TYPE_USB3,
+          as defined in dt-bindings/phy/phy.h.
+        const: 1
 
-    '#phy-cells':
-      description: The cell contains the mode, PHY_TYPE_USB2 or PHY_TYPE_USB3,
-        as defined in dt-bindings/phy/phy.h.
-      const: 1
+    required:
+      - phys
+      - '#phy-cells'
 
-  usb3-phy:
+    additionalProperties: false
+
+  pcie-phy:
+    type: object
+
+    properties:
+      phys:
+        items:
+          - description: phandle to Serdes PHY
+
+      '#phy-cells':
+        description: The cell contains the mode, PHY_TYPE_PCIE or PHY_TYPE_USB3,
+          as defined in dt-bindings/phy/phy.h.
+        const: 1
+
+    required:
+      - phys
+      - '#phy-cells'
+
+    additionalProperties: false
 
-  phys:
-    items:
-      - description: phandle to Serdes PHY. Optional if USB 3.0 is not used.
+patternProperties:
+  '^usb2-phy@[0-9-a-f]+$':
+    type: object
+
+    properties:
+      reg:
+        enum: [0x0, 0x1000]
 
+      airoha,usb2-monitor-clk-sel:
+        description: Describe what oscillator across the available 4
+          should be selected for USB 2.0 Slew Rate calibration.
+        $ref: /schemas/types.yaml#/definitions/uint32
+        enum: [0, 1, 2, 3]
+
+      '#phy-cells':
+        description: The cell contains the mode, PHY_TYPE_USB2 or PHY_TYPE_USB3,
+          as defined in dt-bindings/phy/phy.h.
+        const: 1
+
+    required:
+      - reg
+      - airoha,usb2-monitor-clk-sel
+      - '#phy-cells'
+
+    additionalProperties: false
 
 required:
   - compatible
   - reg
-  - airoha,usb2-monitor-clk-sel
-  - '#phy-cells'
-
-additionalProperties: false
+  - reg-names
+
+allOf:
+  - if:
+      properties:
+        compatible:
+          const: airoha,an7583-usb-phy
+
+    then:
+      properties:
+        reg:
+          items:
+            - description: phy register
+            - description: ana register
+            - description: pma register
+            - description: dig register
+
+        reg-names:
+          items:
+            - const: phy
+            - const: ana
+            - const: pma
+            - const: dig
+
+        pcie-phy: false
+
+      required:
+        - '#address-cells'
+        - '#size-cells'
+
+  - if:
+      properties:
+        compatible:
+          const: airoha,an7583-pcie-phy
+
+    then:
+      properties:
+        reg:
+          items:
+            - description: ana register
+            - description: pma register
+            - description: dig register
+
+        reg-names:
+          items:
+            - const: ana
+            - const: pma
+            - const: dig
+
+        usb3-phy: false
+
+        '#address-cells': false
+
+        '#size-cells': false
+
+      patternProperties:
+        '^usb2-phy@[0-9a-f]+$': false
+
+unevaluatedProperties: false
 
 examples:
   - |
-    #include <dt-bindings/soc/airoha,scu-ssr.h>
-
     phy@1fac0000 {
-        compatible = "airoha,an7581-usb-phy";
-        reg = <0x1fac0000 0x10000>;
+        compatible = "airoha,an7583-usb-phy";
+        reg = <0x1fac0000 0x11ff>,
+              <0x1fa6f000 0xff>,
+              <0x1fa6e000 0x3ff>,
+              <0x1fa6a000 0x8ff>;
+        reg-names = "phy", "ana", "pma", "dig";
+
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        usb2-phy@0 {
+            reg = <0x0>;
+            airoha,usb2-monitor-clk-sel = <0>;
+
+            #phy-cells = <1>;
+        };
+
+        usb2-phy@1000 {
+            reg = <0x1000>;
+            airoha,usb2-monitor-clk-sel = <1>;
+
+            #phy-cells = <1>;
+        };
+
+        usb3-phy {
+            phys = <&serdes_phy>;
+
+            #phy-cells = <1>;
+        };
+      };
+
+    phy@1fa5f000 {
+        compatible = "airoha,an7583-pcie-phy";
+        reg = <0x1fa5f000 0xff>,
+              <0x1fa5e000 0x3ff>,
+              <0x1fa5a000 0x8ff>;
+        reg-names = "ana", "pma", "dig";
 
-        airoha,usb2-monitor-clk-sel = <1>;
-        phys = <&scu AIROHA_SCU_SERDES_USB1>;
+        pcie-phy {
+            phys = <&serdes_phy>;
 
-        #phy-cells = <1>;
+            #phy-cells = <1>;
+        };
     };
-- 
2.53.0