Re: [PATCH v4 1/2] dt-bindings: PCI: amd-mdb: Add CPM6 support

[Rob Herring <robh@kernel.org>]

On Sat, Aug 08, 2026 at 04:22:55PM +0530, Sai Krishna Musham wrote:
> The AMD CPM6 PCIe controller is based on the Synopsys DesignWare PCIe IP.
> Add "intr" to snps,dw-pcie.yaml vendor-specific reg-names for the
> per-controller interrupt register region used by CPM6.
> 
> Update amd,versal2-mdb-host.yaml with separate register definitions:
> - MDB5: 4 regions (slcr, config, dbi, atu)
> - CPM6: 5 regions (slcr, config, dbi, atu, intr)
> 
> Signed-off-by: Sai Krishna Musham <sai.krishna.musham@amd.com>
> ---
> Changes in v4:
> - None
> 
> Changes in v3:
> - Update subject to match history.
> - Move allOf to the end, after required block.
> - Drop the CPM6 example.
> 
> Changes in v2:
> - Update the CPM6 device tree binding and example.
> 
> v1 https://lore.kernel.org/all/20260402180006.486229-2-sai.krishna.musham@amd.com/
> v2 https://lore.kernel.org/all/20260728202044.1785986-2-sai.krishna.musham@amd.com/
> v3 https://lore.kernel.org/all/20260803144412.713639-2-sai.krishna.musham@amd.com/
> ---
>  .../bindings/pci/amd,versal2-mdb-host.yaml    | 45 ++++++++++++++++---
>  .../devicetree/bindings/pci/snps,dw-pcie.yaml |  2 +
>  2 files changed, 42 insertions(+), 5 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml b/Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml
> index 406c15e1dee1..672589066854 100644
> --- a/Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml
> +++ b/Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml
> @@ -9,27 +9,30 @@ title: AMD Versal2 MDB(Multimedia DMA Bridge) Host Controller
>  maintainers:
>    - Thippeswamy Havalige <thippeswamy.havalige@amd.com>
>  
> -allOf:
> -  - $ref: /schemas/pci/pci-host-bridge.yaml#
> -  - $ref: /schemas/pci/snps,dw-pcie.yaml#
> -
>  properties:
>    compatible:
> -    const: amd,versal2-mdb-host
> +    enum:
> +      - amd,versal2-mdb-host
> +      - amd,versal2-cpm6-host
> +      - amd,versal2-cpm6-host1

What is host and host1 difference? Please explain somewhere.

>  
>    reg:
> +    minItems: 4
>      items:
>        - description: MDB System Level Control and Status Register (SLCR) Base
>        - description: configuration region
>        - description: data bus interface
>        - description: address translation unit register
> +      - description: CPM6 PCIe error and event interrupt registers
>  
>    reg-names:
> +    minItems: 4
>      items:
>        - const: slcr
>        - const: config
>        - const: dbi
>        - const: atu
> +      - const: intr
>  
>    ranges:
>      maxItems: 2
> @@ -92,6 +95,38 @@ required:
>    - "#interrupt-cells"
>    - interrupt-controller
>  
> +allOf:
> +  - $ref: /schemas/pci/pci-host-bridge.yaml#
> +  - $ref: /schemas/pci/snps,dw-pcie.yaml#
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: amd,versal2-mdb-host
> +    then:
> +      properties:
> +        reg:
> +          minItems: 4

Drop. 4 is already the min.

> +          maxItems: 4
> +        reg-names:
> +          minItems: 4
> +          maxItems: 4
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - amd,versal2-cpm6-host
> +              - amd,versal2-cpm6-host1
> +    then:
> +      properties:
> +        reg:
> +          minItems: 5
> +          maxItems: 5

Drop. 5 is already the max.

> +        reg-names:
> +          minItems: 5
> +          maxItems: 5
> +
>  unevaluatedProperties: false
>  
>  examples:
> diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml
> index b3216141881c..21f86609ddb6 100644
> --- a/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml
> @@ -117,6 +117,8 @@ properties:
>                enum: [ ecam ]
>              - description: AMD MDB PCIe SLCR region
>                const: slcr
> +            - description: AMD CPM6 PCIe error and event interrupt registers
> +              const: intr
>      allOf:
>        - contains:
>            enum: [ dbi, ctrl ]
> -- 
> 2.44.4
>