From: Sven Peter <sven@kernel.org>
To: Sven Peter <sven@kernel.org>, Janne Grunau <j@jannau.net>,
Neal Gompa <neal@gompa.dev>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>
Cc: Joshua Peisach <jpeisach@ubuntu.com>,
asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Conor Dooley <conor.dooley@microchip.com>
Subject: [PATCH v2 1/3] dt-bindings: reset: Add Apple SoC CIO reset
Date: Fri, 21 Aug 2026 17:44:54 +0200 [thread overview]
Message-ID: <20260821-b4-cio-reset-v2-1-2d045f80a424@kernel.org> (raw)
In-Reply-To: <20260821-b4-cio-reset-v2-0-2d045f80a424@kernel.org>
The CIO (USB4/Thunderbolt) blocks on Apple Silicon SoCs have a reset
inside the power manager that has to be deasserted before their
co-processor can be booted. On t8103 each port comes with a dedicated
register page, represented as a standalone node. On t600x a single
register shared by all ports of a die is located in the middle of the
PMGR MMIO region instead, represented as a sub-node of the PMGR syscon.
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Sven Peter <sven@kernel.org>
---
.../devicetree/bindings/arm/apple/apple,pmgr.yaml | 12 +++++
.../bindings/reset/apple,t8103-cio-reset.yaml | 61 ++++++++++++++++++++++
MAINTAINERS | 1 +
3 files changed, 74 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml b/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml
index c67b67ba065a..49b4bec36461 100644
--- a/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml
+++ b/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml
@@ -59,6 +59,12 @@ patternProperties:
type: object
$ref: /schemas/power/apple,pmgr-pwrstate.yaml#
+ "reset-controller@[0-9a-f]+$":
+ description:
+ Reset controller for the CIO (USB4/Thunderbolt) blocks
+ type: object
+ $ref: /schemas/reset/apple,t8103-cio-reset.yaml#
+
required:
- compatible
- reg
@@ -103,6 +109,12 @@ examples:
label = "uart0";
power-domains = <&ps_uart_p>;
};
+
+ reset-controller@13034 {
+ compatible = "apple,t6000-cio-reset";
+ reg = <0x13034 0x4>;
+ #reset-cells = <1>;
+ };
};
power-management@23d280000 {
diff --git a/Documentation/devicetree/bindings/reset/apple,t8103-cio-reset.yaml b/Documentation/devicetree/bindings/reset/apple,t8103-cio-reset.yaml
new file mode 100644
index 000000000000..6f602669d242
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/apple,t8103-cio-reset.yaml
@@ -0,0 +1,61 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/reset/apple,t8103-cio-reset.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Apple SoC CIO (USB4/Thunderbolt) block reset controller
+
+maintainers:
+ - Sven Peter <sven@kernel.org>
+
+description: |
+ The CIO (Converged I/O) blocks on Apple Silicon SoCs have a reset
+ inside the power manager (PMGR) that has to be deasserted before
+ their co-processor can be booted. On t8103 each port comes with a
+ dedicated register page, represented as a standalone node. On t600x a
+ single register shared by all ports of a die with one request bit per
+ port is used instead. Since this register is located in the middle of
+ the PMGR MMIO region it is represented as a sub-node of the PMGR
+ syscon with reg used as an offset into it.
+
+ In both cases the reset id is the CIO port index on the die.
+
+properties:
+ compatible:
+ oneOf:
+ - enum:
+ - apple,t8103-cio-reset
+ - apple,t6000-cio-reset
+ - items:
+ - const: apple,t8112-cio-reset
+ - const: apple,t8103-cio-reset
+ - items:
+ - const: apple,t6020-cio-reset
+ - const: apple,t6000-cio-reset
+
+ reg:
+ maxItems: 1
+
+ '#reset-cells':
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - '#reset-cells'
+
+additionalProperties: false
+
+examples:
+ - |
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ reset-controller@23b784000 {
+ compatible = "apple,t8103-cio-reset";
+ reg = <0x2 0x3b784000 0x0 0x8000>;
+ #reset-cells = <1>;
+ };
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index 8014b9f8253e..e1ec54f4d80e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2606,6 +2606,7 @@ F: Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml
F: Documentation/devicetree/bindings/power/apple*
F: Documentation/devicetree/bindings/power/reset/apple,smc-reboot.yaml
F: Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml
+F: Documentation/devicetree/bindings/reset/apple,t8103-cio-reset.yaml
F: Documentation/devicetree/bindings/rtc/apple,smc-rtc.yaml
F: Documentation/devicetree/bindings/spi/apple,spi.yaml
F: Documentation/devicetree/bindings/spmi/apple,spmi.yaml
--
2.55.0
next prev parent reply other threads:[~2026-08-21 15:45 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-21 15:44 [PATCH v2 0/3] Apple SoC CIO (USB4/Thunderbolt) reset controller Sven Peter
2026-08-21 15:44 ` Sven Peter [this message]
2026-08-21 15:44 ` [PATCH v2 2/3] reset: Add Apple SoC CIO reset driver Sven Peter
2026-08-21 15:44 ` [PATCH v2 3/3] arm64: dts: apple: Add CIO reset controllers Sven Peter
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