From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx.nabladev.com (mx.nabladev.com [178.251.229.89]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 97CCA3749E1; Sat, 22 Aug 2026 07:48:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.251.229.89 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787384918; cv=none; b=MeLjGno7L8adFdsVdvJ1eK/CVNnsLtTTt0VamS37jxXj+xrMdnSJMxhT6QG8u3DQB7nU9R9yH0lem2tUh6EWamMRvWHApY7XEtc9nmgFI7ZFZA8E313f5/AiBLADzzqOPT0CFJnp9X1/4canHxAtRSHaPPV01UIxDk74eB2Qags= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787384918; c=relaxed/simple; bh=eEKcp+ZFeX/Ksan9V6AYgrDLNZy6ma+EOy9OsvdWJDg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=rqVlt7wzoBjxpjxaucW7o7N2oNcGhGk/2vfwWc9F/3N0ihk+RVUPP1U/3pYc9F+vEhIH4SLu/XdwFheuGz3JHGEhZ7BfFd1iHASwu6/ebnIRS7K2nDJozVeH/U/g+mLTNJ3KxKEYx40hMWDeetIKRluflC4Sk91AcPGwXeZ0x1M= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nabladev.com; spf=pass smtp.mailfrom=nabladev.com; dkim=pass (2048-bit key) header.d=nabladev.com header.i=@nabladev.com header.b=eIsFXOOI; arc=none smtp.client-ip=178.251.229.89 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nabladev.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=nabladev.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=nabladev.com header.i=@nabladev.com header.b="eIsFXOOI" Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 4937D11C816; Sat, 22 Aug 2026 09:48:29 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nabladev.com; s=dkim; t=1787384910; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=Odsb7mrDdpSm6YigiuUwk+GtdjNZDbTtQ5jOjfU5W1I=; b=eIsFXOOIVYKHSWd7LVpLwO78iE4CvSivRKndkdHlqQOqRHqT/Ei6qgBep1wMhfmssbLc7Z MWZPpNwm9nQPcwWswY4QS8E5efuToAKmOvMWwI6lhrySkVaR91jelJcV8MTdzAuOzDurtu ANxqguOGHEbNhNm0uPT2Uwg/Rssl3ofvL0zT7FM4iXd5ZCTi/78luzMtrw1YBzNwC+fDIT GLUOhUJJpau7Lj8/t+eve3E+pF17QTb93e4B9FYsz7svrwQbVstHp6Iu+fEt/j5fY+miQ4 7o3Rkgy/tMR0Lg39dPatnvDYf6eAXQTYaMJv7StoNyXmo5sEeZIpBKYLDlK9GA== From: Marek Vasut To: linux-usb@vger.kernel.org Cc: fabrice.gasnier@foss.st.com, Pankaj Dev , Rahul Kumar , =?UTF-8?q?Cl=C3=A9ment=20Le=20Goffic?= , Marek Vasut , Alexandre Torgue , Christian Bruel , Conor Dooley , Greg Kroah-Hartman , Krzysztof Kozlowski , Maxime Coquelin , Neil Armstrong , Rob Herring , Rosen Penev , Thinh Nguyen , Vinod Koul , devicetree@vger.kernel.org, kernel@dh-electronics.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v3 1/9] dt-bindings: phy: Document ST STM32MP25 USB2-FEMTO PHY Date: Sat, 22 Aug 2026 09:46:34 +0200 Message-ID: <20260822074816.548662-2-marex@nabladev.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260822074816.548662-1-marex@nabladev.com> References: <20260822074816.548662-1-marex@nabladev.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Last-TLS-Session-Version: TLSv1.3 From: Pankaj Dev Document USB2 PHY for STM32MP25 USB2 controllers, which includes the USB2.0 host-only controller and USB 2.0 part of the DWC3 controller. Two such PHYs in total are present in STM32MP25 SoC, they both are slightly different, therefore they use different compatible string to discern them. Signed-off-by: Pankaj Dev Co-developed-by: Rahul Kumar Signed-off-by: Rahul Kumar Co-developed-by: Fabrice Gasnier Signed-off-by: Fabrice Gasnier Co-developed-by: Clément Le Goffic Signed-off-by: Clément Le Goffic Co-developed-by: Marek Vasut Signed-off-by: Marek Vasut --- Cc: Alexandre Torgue Cc: Christian Bruel Cc: Conor Dooley Cc: Fabrice Gasnier Cc: Greg Kroah-Hartman Cc: Krzysztof Kozlowski Cc: Maxime Coquelin Cc: Neil Armstrong Cc: Pankaj Dev Cc: Rahul Kumar Cc: Rob Herring Cc: Rosen Penev Cc: Thinh Nguyen Cc: Vinod Koul Cc: devicetree@vger.kernel.org Cc: kernel@dh-electronics.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-phy@lists.infradead.org Cc: linux-stm32@st-md-mailman.stormreply.com Cc: linux-usb@vger.kernel.org --- V2: - Fix up Sob/Cdb lines - Fix up compatible string in example - Use additionalProperties: false - Expand description: - Use clock-cells = <1> to discern OSC and future PLL clock from the PHY V3: - Move clock-cells next to PHY cells - Fix the bindings - Fix up Sob/Cdb lines further --- .../bindings/phy/st,stm32-usb2phy.yaml | 67 +++++++++++++++++++ 1 file changed, 67 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/st,stm32-usb2phy.yaml diff --git a/Documentation/devicetree/bindings/phy/st,stm32-usb2phy.yaml b/Documentation/devicetree/bindings/phy/st,stm32-usb2phy.yaml new file mode 100644 index 0000000000000..cc5044790beea --- /dev/null +++ b/Documentation/devicetree/bindings/phy/st,stm32-usb2phy.yaml @@ -0,0 +1,67 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/st,stm32-usb2phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics STM32 MPU High-Speed USB PHY + +description: + USB2 PHY block in STM32 is attached to USB 2.0 Host controller and + USB 2.0 side of DWC3 DRD controller, and provides the USB LS/FS/HS + connectivity. Both PHYs are the FEMTO-PHY, but their configuration + bits in the system control register are different for each variant. + +maintainers: + - Fabrice Gasnier + - Marek Vasut + - Pankaj Dev + +properties: + compatible: + enum: + - st,stm32mp25-usb2phy1 + - st,stm32mp25-usb2phy2 + + "#clock-cells": + const: 1 + + "#phy-cells": + const: 0 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + resets: + maxItems: 1 + + vdd33-supply: + description: Phandle to regulator providing 3V3 power supply to the USB2 HS PHY + +required: + - compatible + - "#clock-cells" + - "#phy-cells" + - clocks + - resets + - vdd33-supply + +additionalProperties: false + +examples: + - | + #include + #include + + usb-phy@2400 { + compatible = "st,stm32mp25-usb2phy1"; + reg = <0x2400 0x24>; + #phy-cells = <0>; + #clock-cells = <1>; + clocks = <&rcc CK_KER_USB2PHY1>; + resets = <&rcc USB2PHY1_R>; + vdd33-supply = <&vdd33usb>; + }; -- 2.53.0