From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from out-182.mta0.migadu.com (out-182.mta0.migadu.com [91.218.175.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 93DBB2367D5 for ; Fri, 27 Mar 2026 02:38:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.182 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774579103; cv=none; b=snHJPEA8tVx7zdm0iWz63MKJDEmRbgyGbs6R6/DIdk/QoQ9RN8M2W5uw9jng9X/299MmZlnfKXM0Uhk3kucufDi9t+d3D436jR/NFPuGz2ygrhQlj3FiBMOOZjWY3tCj1U5C7pzf4z7iBXiPtlGm+f8nuKWEuH4LK8gidY/1tG4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774579103; c=relaxed/simple; bh=7/NwpzsRqlAf+MRp7INx9BHwm/tLPCfDBemQWHmSiTM=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=AlEUJL3z9J/bslEFOmnvbNsQ5lzjG6BjpcO/RwuKuy7ma1QRKCK7NOlR4OcXMp8DW+zD+7qmUCC8Q8uahrP/i68jyVBGar+ckL5mDicETetbFHHDNf5IkNdKD+64bfY8dWD+L4HmvIxFJSJNKEmylEtyhYF+Mg/iZqtJf2YdOTs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=imxpd0OW; arc=none smtp.client-ip=91.218.175.182 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="imxpd0OW" Message-ID: <219d7312-d64c-489c-8b22-02288f7c161c@linux.dev> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1774579098; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=0W1Ju5RwHqCPiIN+oh76SgqeeInA8ZXDJcYeDdqF8Fo=; b=imxpd0OW7eZRKBn5Jo3KVnug5XTYpOf89zj9KxHvfbjzOaKj1pojtX+yxWBOBIolNHq99N yk2CFNgOBNFjwDRKtOrVVoFJSl6/SBSIiotTujGCCmMgUr3+h5iYwEk1jcaDdQz1/Sw9YW yhiQ4Qgdl6HVcu9jupjV9uRzm9Nv3DU= Date: Fri, 27 Mar 2026 10:37:57 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Subject: Re: [PATCH v2 2/4] mm: memcontrol: change val type to long in __mod_memcg_{lruvec_}state() To: David Laight , "Lorenzo Stoakes (Oracle)" Cc: hannes@cmpxchg.org, hughd@google.com, mhocko@suse.com, roman.gushchin@linux.dev, shakeel.butt@linux.dev, muchun.song@linux.dev, david@kernel.org, ziy@nvidia.com, harry.yoo@oracle.com, yosry.ahmed@linux.dev, imran.f.khan@oracle.com, kamalesh.babulal@oracle.com, axelrasmussen@google.com, yuanchu@google.com, weixugc@google.com, chenridong@huaweicloud.com, mkoutny@suse.com, akpm@linux-foundation.org, hamzamahfooz@linux.microsoft.com, apais@linux.microsoft.com, lance.yang@linux.dev, bhe@redhat.com, usamaarif642@gmail.com, linux-mm@kvack.org, linux-kernel@vger.kernel.org, Qi Zheng References: <5c42058df0e52a4698da005e502deb2fae7bf819.1774447069.git.zhengqi.arch@bytedance.com> <20260326143736.12d22e38@pumpkin> X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. From: Qi Zheng In-Reply-To: <20260326143736.12d22e38@pumpkin> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Migadu-Flow: FLOW_OUT On 3/26/26 10:37 PM, David Laight wrote: > On Thu, 26 Mar 2026 09:19:29 +0000 > "Lorenzo Stoakes (Oracle)" wrote: > >> On Wed, Mar 25, 2026 at 10:13:23PM +0800, Qi Zheng wrote: >>> From: Qi Zheng >>> >>> The __mod_memcg_state() and __mod_memcg_lruvec_state() functions are also >>> used to reparent non-hierarchical stats. In this scenario, the values >>> passed to them are accumulated statistics that might be extremely large >>> and exceed the upper limit of a 32-bit integer. >>> >>> Change the val parameter type from int to long in these functions and >>> their corresponding tracepoints (memcg_rstat_stats) to prevent potential >>> overflow issues. > > Won't that are be true on 32bit systems? > Which means the underlying values need to be u64 not long. On a 32-bit system, such a large number of values ​​should not accumulate. Furthermore, changing it to u64/s64 would mean modifying memcg_vmstats_percpu->state and lruvec_stats_percpu->state, which involves significant changes, so I think it might be unnecessary. Thanks, Qi > > David > >>> >>> Signed-off-by: Qi Zheng >> >> LGTM, so: >> >> Reviewed-by: Lorenzo Stoakes (Oracle) >> >>> --- >>> include/trace/events/memcg.h | 10 +++++----- >>> mm/memcontrol.c | 8 ++++---- >>> 2 files changed, 9 insertions(+), 9 deletions(-) >>> >>> diff --git a/include/trace/events/memcg.h b/include/trace/events/memcg.h >>> index dfe2f51019b4c..51b62c5931fc2 100644 >>> --- a/include/trace/events/memcg.h >>> +++ b/include/trace/events/memcg.h >>> @@ -11,14 +11,14 @@ >>> >>> DECLARE_EVENT_CLASS(memcg_rstat_stats, >>> >>> - TP_PROTO(struct mem_cgroup *memcg, int item, int val), >>> + TP_PROTO(struct mem_cgroup *memcg, int item, long val), >>> >>> TP_ARGS(memcg, item, val), >>> >>> TP_STRUCT__entry( >>> __field(u64, id) >>> __field(int, item) >>> - __field(int, val) >>> + __field(long, val) >>> ), >>> >>> TP_fast_assign( >>> @@ -27,20 +27,20 @@ DECLARE_EVENT_CLASS(memcg_rstat_stats, >>> __entry->val = val; >>> ), >>> >>> - TP_printk("memcg_id=%llu item=%d val=%d", >>> + TP_printk("memcg_id=%llu item=%d val=%ld", >>> __entry->id, __entry->item, __entry->val) >>> ); >>> >>> DEFINE_EVENT(memcg_rstat_stats, mod_memcg_state, >>> >>> - TP_PROTO(struct mem_cgroup *memcg, int item, int val), >>> + TP_PROTO(struct mem_cgroup *memcg, int item, long val), >>> >>> TP_ARGS(memcg, item, val) >>> ); >>> >>> DEFINE_EVENT(memcg_rstat_stats, mod_memcg_lruvec_state, >>> >>> - TP_PROTO(struct mem_cgroup *memcg, int item, int val), >>> + TP_PROTO(struct mem_cgroup *memcg, int item, long val), >>> >>> TP_ARGS(memcg, item, val) >>> ); >>> diff --git a/mm/memcontrol.c b/mm/memcontrol.c >>> index 7fb9cbc10dfbb..4a78550f6174e 100644 >>> --- a/mm/memcontrol.c >>> +++ b/mm/memcontrol.c >>> @@ -527,7 +527,7 @@ unsigned long lruvec_page_state_local(struct lruvec *lruvec, >>> >>> #ifdef CONFIG_MEMCG_V1 >>> static void __mod_memcg_lruvec_state(struct mem_cgroup_per_node *pn, >>> - enum node_stat_item idx, int val); >>> + enum node_stat_item idx, long val); >>> >>> void reparent_memcg_lruvec_state_local(struct mem_cgroup *memcg, >>> struct mem_cgroup *parent, int idx) >>> @@ -784,7 +784,7 @@ static int memcg_page_state_unit(int item); >>> * Normalize the value passed into memcg_rstat_updated() to be in pages. Round >>> * up non-zero sub-page updates to 1 page as zero page updates are ignored. >>> */ >>> -static int memcg_state_val_in_pages(int idx, int val) >>> +static long memcg_state_val_in_pages(int idx, long val) >>> { >>> int unit = memcg_page_state_unit(idx); >>> >>> @@ -831,7 +831,7 @@ static inline void get_non_dying_memcg_end(void) >>> #endif >>> >>> static void __mod_memcg_state(struct mem_cgroup *memcg, >>> - enum memcg_stat_item idx, int val) >>> + enum memcg_stat_item idx, long val) >>> { >>> int i = memcg_stats_index(idx); >>> int cpu; >>> @@ -896,7 +896,7 @@ void reparent_memcg_state_local(struct mem_cgroup *memcg, >>> #endif >>> >>> static void __mod_memcg_lruvec_state(struct mem_cgroup_per_node *pn, >>> - enum node_stat_item idx, int val) >>> + enum node_stat_item idx, long val) >>> { >>> struct mem_cgroup *memcg = pn->memcg; >>> int i = memcg_stats_index(idx); >>> -- >>> 2.20.1 >>> >> >