From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A72F830C608; Thu, 16 Apr 2026 06:34:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776321295; cv=none; b=TSFL9V+sb0u3M2XXUPQCmoO6Tf0Uh3E4wsyxKtQGCgi7NYOjwn2cyUwMfIpBFKC0d4rJYruyKouXcsx7aw6kHISACSH+0uFdDFBTgGXvssK6rcB8Jp0DNIVMSDSB4Kv7YYg6zKqR3aIoZUHANpC8QVhoAmUL3MhRzeiDd3PDs3w= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776321295; c=relaxed/simple; bh=N/Hxqw9DwApKPuJ9Q8r2VvfqDyVC1NQx+qFttUE32ec=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=KTe33gsZiurNuLH59jmb818MSRgJApe8YImoO4zvDeRRNYJJR/Zlgm1oX9RHeft3T8+bsPRGGe8A1eoZsiPSYqi9k3u81JSsbkvIRTXLgGXQNXcSX2MmTThj/w45oy1A+7Qe3kjlAeiSHGHkzx1jOfOJQH8C99O0uusmxVmMPRI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=cdZHAT0v; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="cdZHAT0v" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3EC4DC2BCAF; Thu, 16 Apr 2026 06:34:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1776321295; bh=N/Hxqw9DwApKPuJ9Q8r2VvfqDyVC1NQx+qFttUE32ec=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=cdZHAT0vXpbfokZSv7xRzy05mxSDCfOf33tUtvIScOWAEk77JJnoAeYygSoxyPCb0 V0ZrBENJc1mpoTiu5gS40IjeXSDEsuMCpsaR1iCYtaOmfnk8Q7k+iAzsmpGJxicSHF PF66JySAoLDGB4atVL8uarJS9n6sIAQePQwEaqjlmGVIllzaNndmVv2kcjeQm7h1ok xUb53ZNtu7K0mqRGSkAORW6wxJDrmaCMoxv15QkVuM7D+FrnGvah/6PO2LpE46f5Km 3Q8QTyMZ8Dd1lo40ZF6pclfNEaF1x1bkpz4k88IONbARKbdfdUny6MsX8cjNyW8fKX ixXo6qMpPPbuA== Message-ID: <21b09d39-ff7c-4859-a078-45e303a392e2@kernel.org> Date: Thu, 16 Apr 2026 08:34:50 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/5] clk: qcom: add Global Clock controller (GCC) driver for IPQ9650 SoC To: Kathiravan Thirumoorthy , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260415-ipq9650_boot_to_shell-v1-0-b37eb4c3a1d1@oss.qualcomm.com> <20260415-ipq9650_boot_to_shell-v1-2-b37eb4c3a1d1@oss.qualcomm.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 15/04/2026 15:33, Kathiravan Thirumoorthy wrote: > Add support for the global clock controller found on IPQ9650 SoC. > > Signed-off-by: Kathiravan Thirumoorthy > --- > drivers/clk/qcom/Kconfig | 8 + > drivers/clk/qcom/Makefile | 1 + > drivers/clk/qcom/gcc-ipq9650.c | 3794 ++++++++++++++++++++++++++++++++++++++++ > 3 files changed, 3803 insertions(+) > > diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig > index df21ef5ffd68..ed4c5765557b 100644 > --- a/drivers/clk/qcom/Kconfig > +++ b/drivers/clk/qcom/Kconfig > @@ -434,6 +434,14 @@ config IPQ_GCC_9574 > i2c, USB, SD/eMMC, etc. Select this for the root clock > of ipq9574. > > +config IPQ_GCC_9650 > + tristate "IPQ9650 Global Clock Controller" And the soc is for ARM64? Add proper dependency. > + help > + Support for global clock controller on ipq9650 devices. > + Say Y if you want to use peripheral devices such as UART, SPI, > + i2c, USB, SD/eMMC, etc. Select this for the root clock > + of ipq9650. > + Best regards, Krzysztof