From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DA1F0C4332F for ; Wed, 19 Oct 2022 14:36:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229755AbiJSOgw (ORCPT ); Wed, 19 Oct 2022 10:36:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57514 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231567AbiJSOg1 (ORCPT ); Wed, 19 Oct 2022 10:36:27 -0400 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E35D34AD42 for ; Wed, 19 Oct 2022 07:20:48 -0700 (PDT) Received: from p508fdae2.dip0.t-ipconnect.de ([80.143.218.226] helo=phil.localnet) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1ol9XL-00069g-MB; Wed, 19 Oct 2022 15:55:11 +0200 From: Heiko Stuebner To: Palmer Dabbelt , Paul Walmsley , Anup Patel Cc: Atish Patra , Anup Patel , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Andrew Jones , kernel test robot , Anup Patel , Conor Dooley Subject: Re: [PATCH v4 1/4] RISC-V: Fix compilation without RISCV_ISA_ZICBOM Date: Wed, 19 Oct 2022 15:55:10 +0200 Message-ID: <2257562.ElGaqSPkdT@phil> In-Reply-To: <20221019131128.237026-2-apatel@ventanamicro.com> References: <20221019131128.237026-1-apatel@ventanamicro.com> <20221019131128.237026-2-apatel@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Am Mittwoch, 19. Oktober 2022, 15:11:25 CEST schrieb Anup Patel: > From: Andrew Jones > > riscv_cbom_block_size and riscv_init_cbom_blocksize() should always > be available and riscv_init_cbom_blocksize() should always be > invoked, even when compiling without RISCV_ISA_ZICBOM enabled. This > is because disabling RISCV_ISA_ZICBOM means "don't use zicbom > instructions in the kernel" not "pretend there isn't zicbom, even > when there is". When zicbom is available, whether the kernel enables > its use with RISCV_ISA_ZICBOM or not, KVM will offer it to guests. > Ensure we can build KVM and that the block size is initialized even > when compiling without RISCV_ISA_ZICBOM. > > Fixes: 8f7e001e0325 ("RISC-V: Clean up the Zicbom block size probing") > Reported-by: kernel test robot > Signed-off-by: Andrew Jones > Signed-off-by: Anup Patel > Reviewed-by: Conor Dooley Reviewed-by: Heiko Stuebner [on qemu+zicbom and t-head d1] Tested-by: Heiko Stuebner