From: Marc Zyngier <maz@kernel.org>
To: Jianmin Lv <lvjianmin@loongson.cn>
Cc: Thomas Gleixner <tglx@linutronix.de>,
linux-kernel@vger.kernel.org, Hanjun Guo <guohanjun@huawei.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Jiaxun Yang <jiaxun.yang@flygoat.com>,
Huacai Chen <chenhuacai@loongson.cn>
Subject: Re: [PATCH V14 14/15] irqchip / ACPI: Introduce ACPI_IRQ_MODEL_LPIC for LoongArch
Date: Thu, 14 Jul 2022 11:21:04 +0100 [thread overview]
Message-ID: <22902b5c7616d47f6e48acc536a70da7@kernel.org> (raw)
In-Reply-To: <bfbd08d6-6f09-3ddb-0fdf-8c459352cf0f@loongson.cn>
On 2022-07-14 11:02, Jianmin Lv wrote:
> On 2022/7/8 上午11:17, Jianmin Lv wrote:
>>
>>
>> On 2022/7/7 下午8:59, Marc Zyngier wrote:
>>> On Sun, 03 Jul 2022 09:45:31 +0100,
>>> Jianmin Lv <lvjianmin@loongson.cn> wrote:
>>>>
>>>> For LoongArch, ACPI_IRQ_MODEL_LPIC is introduced, and then the
>>>> callback acpi_get_gsi_domain_id and acpi_gsi_to_irq_fallback are
>>>> implemented.
>>>>
>>>> The acpi_get_gsi_domain_id callback returns related fwnode handle
>>>> of irqdomain for different GSI range.
>>>>
>>>> The acpi_gsi_to_irq_fallback will create new mapping for gsi when
>>>> the mapping of it is not found.
>>>>
>>>> Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn>
>>>> ---
>>>> drivers/acpi/bus.c | 3 +++
>>>> drivers/irqchip/irq-loongarch-cpu.c | 37
>>>> +++++++++++++++++++++++++++++++++++++
>>>> include/linux/acpi.h | 1 +
>>>> 3 files changed, 41 insertions(+)
>>>>
>>>> diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c
>>>> index 86fa61a..63fbf00 100644
>>>> --- a/drivers/acpi/bus.c
>>>> +++ b/drivers/acpi/bus.c
>>>> @@ -1145,6 +1145,9 @@ static int __init acpi_bus_init_irq(void)
>>>> case ACPI_IRQ_MODEL_PLATFORM:
>>>> message = "platform specific model";
>>>> break;
>>>> + case ACPI_IRQ_MODEL_LPIC:
>>>> + message = "LPIC";
>>>> + break;
>>>> default:
>>>> pr_info("Unknown interrupt routing model\n");
>>>> return -ENODEV;
>>>> diff --git a/drivers/irqchip/irq-loongarch-cpu.c
>>>> b/drivers/irqchip/irq-loongarch-cpu.c
>>>> index c2f7411..1b241d7 100644
>>>> --- a/drivers/irqchip/irq-loongarch-cpu.c
>>>> +++ b/drivers/irqchip/irq-loongarch-cpu.c
>>>> @@ -15,6 +15,41 @@
>>>> static struct irq_domain *irq_domain;
>>>> +static int lpic_gsi_to_irq(u32 gsi)
>>>> +{
>>>> + /* Only pch irqdomain transferring is required for LoongArch.
>>>> */
>>>> + if (gsi >= GSI_MIN_PCH_IRQ && gsi <= GSI_MAX_PCH_IRQ)
>>>> + return acpi_register_gsi(NULL, gsi, ACPI_LEVEL_SENSITIVE,
>>>> ACPI_ACTIVE_HIGH);
>>>> + return -1;
>>>
>>> The expected return value on failure is 0 (which indicates that no
>>> interrupt was mapped). Here, things will break as acpi_gsi_to_irq()
>>> stores the result as unsigned, and compares the result to 0.
>>>
>>
>> Ok, thanks, I'll change the return value to 0 on failure and change
>> return type to unsigned int.
>>
>>
>
> Hi, Marc, if the return type is changed to unsigned int, the return
> type of the fallback handler in the patch:
> ACPI: irq: Allow acpi_gsi_to_irq() to have an arch-specific fallback
>
> should be changed to unsigned int too, yes?
Yes, of course.
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2022-07-14 10:21 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-03 8:45 [PATCH V14 00/15] irqchip: Add LoongArch-related irqchip drivers Jianmin Lv
2022-07-03 8:45 ` [PATCH V14 01/15] ACPICA: MADT: Add LoongArch APICs support Jianmin Lv
2022-07-07 10:18 ` Marc Zyngier
2022-07-08 6:02 ` Jianmin Lv
2022-07-03 8:45 ` [PATCH V14 02/15] APCI: irq: Add support for multiple GSI domains Jianmin Lv
2022-07-07 10:16 ` Marc Zyngier
2022-07-08 3:21 ` Jianmin Lv
2022-07-03 8:45 ` [PATCH V14 03/15] ACPI: irq: Allow acpi_gsi_to_irq() to have an arch-specific fallback Jianmin Lv
2022-07-07 10:14 ` Marc Zyngier
2022-07-08 3:23 ` Jianmin Lv
2022-07-03 8:45 ` [PATCH V14 04/15] genirq/generic_chip: export irq_unmap_generic_chip Jianmin Lv
2022-07-03 8:45 ` [PATCH V14 05/15] LoongArch: Use ACPI_GENERIC_GSI for gsi handling Jianmin Lv
2022-07-03 8:45 ` [PATCH V14 06/15] irqchip: Add Loongson PCH LPC controller support Jianmin Lv
2022-07-03 8:45 ` [PATCH V14 07/15] irqchip/loongson-pch-pic: Add ACPI init support Jianmin Lv
2022-07-03 8:45 ` [PATCH V14 08/15] irqchip/loongson-pch-msi: " Jianmin Lv
2022-07-03 8:45 ` [PATCH V14 09/15] irqchip/loongson-htvec: " Jianmin Lv
2022-07-03 8:45 ` [PATCH V14 10/15] irqchip/loongson-liointc: " Jianmin Lv
2022-07-07 10:34 ` Marc Zyngier
2022-07-08 6:13 ` Jianmin Lv
2022-07-03 8:45 ` [PATCH V14 11/15] LoongArch: prepare to support multiple pch-pic and pch-msi irqdomain Jianmin Lv
2022-07-03 8:45 ` [PATCH V14 12/15] irqchip: Add Loongson Extended I/O interrupt controller support Jianmin Lv
2022-07-07 12:30 ` Marc Zyngier
2022-07-10 12:17 ` Jianmin Lv
2022-07-07 13:22 ` maobibo
2022-07-08 11:31 ` Jianmin Lv
2022-07-03 8:45 ` [PATCH V14 13/15] irqchip: Add LoongArch CPU " Jianmin Lv
2022-07-07 12:44 ` Marc Zyngier
2022-07-08 6:08 ` Jianmin Lv
2022-07-03 8:45 ` [PATCH V14 14/15] irqchip / ACPI: Introduce ACPI_IRQ_MODEL_LPIC for LoongArch Jianmin Lv
2022-07-07 12:59 ` Marc Zyngier
2022-07-08 3:17 ` Jianmin Lv
2022-07-14 10:02 ` Jianmin Lv
2022-07-14 10:21 ` Marc Zyngier [this message]
2022-07-03 8:45 ` [PATCH V14 15/15] LoongArch: Fix irq number for timer and ipi Jianmin Lv
2022-07-07 12:08 ` [PATCH V14 00/15] irqchip: Add LoongArch-related irqchip drivers Hu Zeyuan
2022-07-08 2:47 ` Jianmin Lv
2022-07-07 12:51 ` Marc Zyngier
2022-07-08 14:32 ` Moore, Robert
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