From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <linux-kernel-owner@vger.kernel.org>
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
	id S1753511AbcEZJLo (ORCPT <rfc822;w@1wt.eu>);
	Thu, 26 May 2016 05:11:44 -0400
Received: from webbox1416.server-home.net ([77.236.96.61]:56708 "EHLO
	webbox1416.server-home.net" rhost-flags-OK-OK-OK-OK)
	by vger.kernel.org with ESMTP id S1753386AbcEZJLl (ORCPT
	<rfc822;linux-kernel@vger.kernel.org>);
	Thu, 26 May 2016 05:11:41 -0400
From: Alexander Stein <alexander.stein@systec-electronic.com>
To: linux-kernel@vger.kernel.org
Cc: Meng Yi <meng.yi@nxp.com>, Mark Brown <broonie@kernel.org>,
        "dri-devel@lists.freedesktop.org" <dri-devel@lists.freedesktop.org>,
        David Airlie <airlied@linux.ie>, Stefan Agner <stefan@agner.ch>,
        "airlied@redhat.com" <airlied@redhat.com>
Subject: Re: fsl-dcu not works on latest "drm-next"
Date: Thu, 26 May 2016 11:11:30 +0200
Message-ID: <2397536.bIp6BuhYPD@ws-stein>
User-Agent: KMail/4.14.10 (Linux/4.4.6-gentoo; KDE/4.14.16; x86_64; ; )
In-Reply-To: <HE1PR04MB1051A456377DB6BB3531B925EC410@HE1PR04MB1051.eurprd04.prod.outlook.com>
References: <HE1PR04MB105158F9CB2CEC73E6B5F5E9EC7A0@HE1PR04MB1051.eurprd04.prod.outlook.com> <20160525104103.GV8206@sirena.org.uk> <HE1PR04MB1051A456377DB6BB3531B925EC410@HE1PR04MB1051.eurprd04.prod.outlook.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 7Bit
Content-Type: text/plain; charset="us-ascii"
Sender: linux-kernel-owner@vger.kernel.org
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

On Thursday 26 May 2016 08:23:42, Meng Yi wrote:
> Hi Mark,
> 
> > You've not specifically described the problem here - what are the
> > endiannesses of both the CPU and the device you're talking to?  What
> > specifically is the endianess problem you are seeing, what are you seeing
> > and what do you expect to see?
> 
> The CPU is little endian and the device DCU is big endian, specified
> big-endian in DTS,
> 
> And here is my DTS and regmap_config,
> 
> Specified "big-endian" in DTS,
> 
>         dcu: dcu@2ce0000 {
>             compatible = "fsl,ls1021a-dcu";
>             reg = <0x0 0x2ce0000 0x0 0x10000>;
>             interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
>             clocks = <&platform_clk 0>;
>             clock-names = "dcu";
>             big-endian;
>             status = "disabled";
>         };
> 
> I can't tell the difference of "reg_format_endian" and " val_format_endian
> ", so I had tried four conditions. And all failed.
> 
> static const struct regmap_config fsl_dcu_regmap_config = {
>     .reg_bits = 32,
>     .reg_stride = 4,
>     .val_bits = 32,
>     .cache_type = REGCACHE_RBTREE,

This needs to be a flat cache. See https://lists.freedesktop.org/archives/dri-devel/2016-January/099121.html or https://lkml.org/lkml/2016/3/24/281
max_register also needs an appropriate value.

> //  .reg_format_endian = REGMAP_ENDIAN_BIG, //  .val_format_endian =
> REGMAP_ENDIAN_BIG,
> 
>     .volatile_reg = fsl_dcu_drm_is_volatile_reg, };
> 
> 
> I expect that regmap write as big endian, and I am seeing is regmap write as
> little endian.

Check your actual regmap reg_write function.

Best regards,
Alexander