[PATCH 0/2] arm64: dts: qcom: qcs615: Add support for camss

[PATCH 0/2] arm64: dts: qcom: qcs615: Add support for camss

[Wenmeng Liu]

This series adds support to bring up the CSIPHY, CSID, VFE/RDI interfaces 
in QCS615. Tested this on QCS615 ADP AIR board with CSID TPG.

Tested with following commands:
media-ctl --reset
v4l2-ctl -d /dev/v4l-subdev3 -c test_pattern=0
media-ctl -V '"msm_csid0":0[fmt:SRGGB10/1920x1080 field:none]'
media-ctl -V '"msm_vfe0_rdi0":0[fmt:SRGGB10/1920x1080 field:none]'
media-ctl -l '"msm_csid0":1->"msm_vfe0_rdi0":0[1]'
v4l2-ctl -d /dev/v4l-subdev3 -c test_pattern=9
yavta -B capture-mplane -n 5 -f SRGGB10P -s 1920x1080 /dev/video0 --capture=7

This patch series depends on patch series:
https://lore.kernel.org/all/20250518-qcs615_camss-v1-0-12723e26ea3e@quicinc.com/
https://lore.kernel.org/all/20250518-qcs615_camss-v1-0-12723e26ea3e@quicinc.com/
https://lore.kernel.org/all/20250424-qcs615-mm-v7-clock-controllers-v8-0-bacad5b3659a@quicinc.com/

Signed-off-by: Wenmeng Liu <quic_wenmliu@quicinc.com>
---
Wenmeng Liu (2):
      arm64: dts: qcom: qcs615: Add support for camss
      arm64: dts: qcom: qcs615: Enable camss for qcs615-adp-air

 arch/arm64/boot/dts/qcom/qcs615-ride.dts |   7 ++
 arch/arm64/boot/dts/qcom/qcs615.dtsi     | 133 +++++++++++++++++++++++++++++++
 2 files changed, 140 insertions(+)
---
base-commit: 5840726e19bb6e86566a9fa68c2dc21ed64761d4
change-id: 20250520-qcs615-adp-air-camss-4109fc2ce430

Best regards,
-- 
Wenmeng Liu <quic_wenmliu@quicinc.com>

[PATCH 1/2] arm64: dts: qcom: qcs615: Add support for camss

[Wenmeng Liu]

Add support for the camera subsystem on the QCS615 Qualcomm SoC. This
includes bringing up the CSIPHY, CSID, VFE/RDI interfaces.

QCS615 provides
- 2 x VFE, 3 RDI per VFE
- 1 x VFE Lite, 4 RDI per VFE
- 2 x CSID
- 1 x CSID Lite
- 3 x CSI PHY

Signed-off-by: Wenmeng Liu <quic_wenmliu@quicinc.com>
---
 arch/arm64/boot/dts/qcom/qcs615.dtsi | 133 +++++++++++++++++++++++++++++++++++
 1 file changed, 133 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi
index 47e350f175860e7b06f7b2c13fed75a65e489c8a..535251efc6b559447482b9ecc67ca26e7efbbb8c 100644
--- a/arch/arm64/boot/dts/qcom/qcs615.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi
@@ -3242,6 +3242,139 @@ videocc: clock-controller@ab00000 {
                         #power-domain-cells = <1>;
                 };
 
+		camss: camss@acb3000 {
+			compatible = "qcom,qcs615-camss";
+
+			reg = <0x0 0x0acb3000 0x0 0x1000>,
+			      <0x0 0x0acba000 0x0 0x1000>,
+			      <0x0 0x0acc8000 0x0 0x1000>,
+			      <0x0 0x0ac65000 0x0 0x1000>,
+			      <0x0 0x0ac66000 0x0 0x1000>,
+			      <0x0 0x0ac67000 0x0 0x1000>,
+			      <0x0 0x0acaf000 0x0 0x4000>,
+			      <0x0 0x0acb6000 0x0 0x4000>,
+			      <0x0 0x0acc4000 0x0 0x4000>;
+			reg-names = "csid0",
+				    "csid1",
+				    "csid_lite",
+				    "csiphy0",
+				    "csiphy1",
+				    "csiphy2",
+				    "vfe0",
+				    "vfe1",
+				    "vfe_lite";
+
+			clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>,
+				 <&camcc CAM_CC_CPAS_AHB_CLK>,
+				 <&camcc CAM_CC_CPHY_RX_CLK_SRC>,
+				 <&camcc CAM_CC_CSIPHY0_CLK>,
+				 <&camcc CAM_CC_CSI0PHYTIMER_CLK>,
+				 <&camcc CAM_CC_CSIPHY1_CLK>,
+				 <&camcc CAM_CC_CSI1PHYTIMER_CLK>,
+				 <&camcc CAM_CC_CSIPHY2_CLK>,
+				 <&camcc CAM_CC_CSI2PHYTIMER_CLK>,
+				 <&gcc GCC_CAMERA_HF_AXI_CLK>,
+				 <&camcc CAM_CC_SLOW_AHB_CLK_SRC>,
+				 <&camcc CAM_CC_SOC_AHB_CLK>,
+				 <&camcc CAM_CC_IFE_0_CLK>,
+				 <&camcc CAM_CC_IFE_0_AXI_CLK>,
+				 <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>,
+				 <&camcc CAM_CC_IFE_0_CSID_CLK>,
+				 <&camcc CAM_CC_IFE_0_CLK_SRC>,
+				 <&camcc CAM_CC_IFE_1_CLK>,
+				 <&camcc CAM_CC_IFE_1_AXI_CLK>,
+				 <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>,
+				 <&camcc CAM_CC_IFE_1_CSID_CLK>,
+				 <&camcc CAM_CC_IFE_1_CLK_SRC>,
+				 <&camcc CAM_CC_IFE_LITE_CLK>,
+				 <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>,
+				 <&camcc CAM_CC_IFE_LITE_CSID_CLK>,
+				 <&camcc CAM_CC_IFE_LITE_CLK_SRC>;
+
+			clock-names = "camnoc_axi",
+				      "cpas_ahb",
+				      "cphy_rx_src",
+				      "csiphy0",
+				      "csiphy0_timer",
+				      "csiphy1",
+				      "csiphy1_timer",
+				      "csiphy2",
+				      "csiphy2_timer",
+				      "gcc_axi_hf",
+				      "slow_ahb_src",
+				      "soc_ahb",
+				      "vfe0",
+				      "vfe0_axi",
+				      "vfe0_cphy_rx",
+				      "vfe0_csid",
+				      "vfe0_src",
+				      "vfe1",
+				      "vfe1_axi",
+				      "vfe1_cphy_rx",
+				      "vfe1_csid",
+				      "vfe1_src",
+				      "vfe_lite",
+				      "vfe_lite_cphy_rx",
+				      "vfe_lite_csid",
+				      "vfe_lite_src";
+
+			interconnects = <&gem_noc MASTER_APPSS_PROC 0
+					 &config_noc SLAVE_CAMERA_CFG 0>,
+					<&mmss_noc MASTER_CAMNOC_HF0 0
+					 &mc_virt SLAVE_EBI1 0>;
+			interconnect-names = "ahb",
+					     "hf_0_mnoc";
+
+			interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>;
+			interrupt-names = "csid0",
+					  "csid1",
+					  "csid_lite",
+					  "csiphy0",
+					  "csiphy1",
+					  "csiphy2",
+					  "vfe0",
+					  "vfe1",
+					  "vfe_lite";
+
+			iommus = <&apps_smmu 0x820 0x40>,
+				 <&apps_smmu 0x840 0x0>,
+				 <&apps_smmu 0x860 0x40>;
+
+			power-domains = <&camcc IFE_0_GDSC>,
+					<&camcc IFE_1_GDSC>,
+					<&camcc TITAN_TOP_GDSC>;
+			power-domain-names = "ife0",
+					     "ife1",
+					     "top";
+
+			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+				};
+
+				port@1 {
+					reg = <1>;
+				};
+
+				port@2 {
+					reg = <2>;
+				};
+			};
+		};
+
 		camcc: clock-controller@ad00000 {
                         compatible = "qcom,qcs615-camcc";
                         reg = <0 0x0ad00000 0 0x10000>;

-- 
2.34.1

[PATCH 2/2] arm64: dts: qcom: qcs615: Enable camss for qcs615-adp-air

[Wenmeng Liu]

This change enables camera driver for QCS615 ADP AIR board.

Signed-off-by: Wenmeng Liu <quic_wenmliu@quicinc.com>
---
 arch/arm64/boot/dts/qcom/qcs615-ride.dts | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/qcs615-ride.dts b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
index 2b5aa3c66867676bda59ff82b902b6e4974126f8..be8b829ec508d7de7a4cd6be6d1d4e83b09734bb 100644
--- a/arch/arm64/boot/dts/qcom/qcs615-ride.dts
+++ b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
@@ -211,6 +211,13 @@ vreg_l17a: ldo17 {
 	};
 };
 
+&camss {
+	vdda-phy-supply = <&vreg_l5a>;
+	vdda-pll-supply = <&vreg_l12a>;
+
+	status = "ok";
+};
+
 &gcc {
 	clocks = <&rpmhcc RPMH_CXO_CLK>,
 		 <&rpmhcc RPMH_CXO_CLK_A>,

-- 
2.34.1

Re: [PATCH 0/2] arm64: dts: qcom: qcs615: Add support for camss

[Krzysztof Kozlowski]

On 20/05/2025 10:56, Wenmeng Liu wrote:
> This series adds support to bring up the CSIPHY, CSID, VFE/RDI interfaces 
> in QCS615. Tested this on QCS615 ADP AIR board with CSID TPG.
> 
> Tested with following commands:
> media-ctl --reset
> v4l2-ctl -d /dev/v4l-subdev3 -c test_pattern=0
> media-ctl -V '"msm_csid0":0[fmt:SRGGB10/1920x1080 field:none]'
> media-ctl -V '"msm_vfe0_rdi0":0[fmt:SRGGB10/1920x1080 field:none]'
> media-ctl -l '"msm_csid0":1->"msm_vfe0_rdi0":0[1]'
> v4l2-ctl -d /dev/v4l-subdev3 -c test_pattern=9
> yavta -B capture-mplane -n 5 -f SRGGB10P -s 1920x1080 /dev/video0 --capture=7
> 
> This patch series depends on patch series:
> https://lore.kernel.org/all/20250518-qcs615_camss-v1-0-12723e26ea3e@quicinc.com/
> https://lore.kernel.org/all/20250518-qcs615_camss-v1-0-12723e26ea3e@quicinc.com/
> https://lore.kernel.org/all/20250424-qcs615-mm-v7-clock-controllers-v8-0-bacad5b3659a@quicinc.com/

Three dependencies? So this cannot be tested in any close future. You
need to rework the way you upstream, to avoid multiple dependencies.
This was already communicated multiple times.

Best regards,
Krzysztof

Re: [PATCH 2/2] arm64: dts: qcom: qcs615: Enable camss for qcs615-adp-air

[Krzysztof Kozlowski]

On 20/05/2025 10:56, Wenmeng Liu wrote:
> This change enables camera driver for QCS615 ADP AIR board.
> 
> Signed-off-by: Wenmeng Liu <quic_wenmliu@quicinc.com>
> ---
>  arch/arm64/boot/dts/qcom/qcs615-ride.dts | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/qcs615-ride.dts b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
> index 2b5aa3c66867676bda59ff82b902b6e4974126f8..be8b829ec508d7de7a4cd6be6d1d4e83b09734bb 100644
> --- a/arch/arm64/boot/dts/qcom/qcs615-ride.dts
> +++ b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
> @@ -211,6 +211,13 @@ vreg_l17a: ldo17 {
>  	};
>  };
>  
> +&camss {
> +	vdda-phy-supply = <&vreg_l5a>;
> +	vdda-pll-supply = <&vreg_l12a>;
> +
> +	status = "ok";
Standard qcom comment...

It does not look like you tested the DTS against bindings. Please run
`make dtbs_check W=1` (see
Documentation/devicetree/bindings/writing-schema.rst or
https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
for instructions).
Maybe you need to update your dtschema and yamllint. Don't rely on
distro packages for dtschema and be sure you are using the latest
released dtschema.

Best regards,
Krzysztof

Re: [PATCH 2/2] arm64: dts: qcom: qcs615: Enable camss for qcs615-adp-air

[Wenmeng Liu]

On 2025/5/20 17:44, Krzysztof Kozlowski wrote:
> On 20/05/2025 10:56, Wenmeng Liu wrote:
>> This change enables camera driver for QCS615 ADP AIR board.
>>
>> Signed-off-by: Wenmeng Liu <quic_wenmliu@quicinc.com>
>> ---
>>   arch/arm64/boot/dts/qcom/qcs615-ride.dts | 7 +++++++
>>   1 file changed, 7 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/qcs615-ride.dts b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
>> index 2b5aa3c66867676bda59ff82b902b6e4974126f8..be8b829ec508d7de7a4cd6be6d1d4e83b09734bb 100644
>> --- a/arch/arm64/boot/dts/qcom/qcs615-ride.dts
>> +++ b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
>> @@ -211,6 +211,13 @@ vreg_l17a: ldo17 {
>>   	};
>>   };
>>   
>> +&camss {
>> +	vdda-phy-supply = <&vreg_l5a>;
>> +	vdda-pll-supply = <&vreg_l12a>;
>> +
>> +	status = "ok";
> Standard qcom comment...
> 
> It does not look like you tested the DTS against bindings. Please run
> `make dtbs_check W=1` (see
> Documentation/devicetree/bindings/writing-schema.rst or
> https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
> for instructions).
> Maybe you need to update your dtschema and yamllint. Don't rely on
> distro packages for dtschema and be sure you are using the latest
> released dtschema.
> 
> Best regards,
> Krzysztof

Hi Krzysztof

I only used the CAMSS dt-bindings to check the DTS. Will pay more 
attention to it next time.

Thanks,
Wenmeng

Re: [PATCH 1/2] arm64: dts: qcom: qcs615: Add support for camss

[Dmitry Baryshkov]

On Tue, May 20, 2025 at 04:56:51PM +0800, Wenmeng Liu wrote:
> Add support for the camera subsystem on the QCS615 Qualcomm SoC. This
> includes bringing up the CSIPHY, CSID, VFE/RDI interfaces.
> 
> QCS615 provides
> - 2 x VFE, 3 RDI per VFE
> - 1 x VFE Lite, 4 RDI per VFE
> - 2 x CSID
> - 1 x CSID Lite
> - 3 x CSI PHY
> 
> Signed-off-by: Wenmeng Liu <quic_wenmliu@quicinc.com>
> ---
>  arch/arm64/boot/dts/qcom/qcs615.dtsi | 133 +++++++++++++++++++++++++++++++++++
>  1 file changed, 133 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi
> index 47e350f175860e7b06f7b2c13fed75a65e489c8a..535251efc6b559447482b9ecc67ca26e7efbbb8c 100644
> --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi
> +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi
> @@ -3242,6 +3242,139 @@ videocc: clock-controller@ab00000 {
>                          #power-domain-cells = <1>;
>                  };
>  
> +		camss: camss@acb3000 {

camss: isp@acb3000 {}


-- 
With best wishes
Dmitry

Re: [PATCH 2/2] arm64: dts: qcom: qcs615: Enable camss for qcs615-adp-air

[Vladimir Zapolskiy]

Hello Wenmeng,

On 5/20/25 11:56, Wenmeng Liu wrote:
> This change enables camera driver for QCS615 ADP AIR board.

what is the rationale of enabling CAMSS on the board without giving any
description of any sensors connected to the SoC?

> Signed-off-by: Wenmeng Liu <quic_wenmliu@quicinc.com>
> ---
>   arch/arm64/boot/dts/qcom/qcs615-ride.dts | 7 +++++++
>   1 file changed, 7 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/qcs615-ride.dts b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
> index 2b5aa3c66867676bda59ff82b902b6e4974126f8..be8b829ec508d7de7a4cd6be6d1d4e83b09734bb 100644
> --- a/arch/arm64/boot/dts/qcom/qcs615-ride.dts
> +++ b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
> @@ -211,6 +211,13 @@ vreg_l17a: ldo17 {
>   	};
>   };
>   
> +&camss {
> +	vdda-phy-supply = <&vreg_l5a>;
> +	vdda-pll-supply = <&vreg_l12a>;
> +
> +	status = "ok";
> +};
> +

--
Best wishes,
Vladimir

Re: [PATCH 2/2] arm64: dts: qcom: qcs615: Enable camss for qcs615-adp-air

[Wenmeng Liu]

On 2025/5/20 20:19, Vladimir Zapolskiy wrote:
> Hello Wenmeng,
> 
> On 5/20/25 11:56, Wenmeng Liu wrote:
>> This change enables camera driver for QCS615 ADP AIR board.
> 
> what is the rationale of enabling CAMSS on the board without giving any
> description of any sensors connected to the SoC?
> 

Hi Vladimir,

We can perform validation through the CSID TPG(Test Pattern Generator), 
so I enabled CAMSS.

Thanks,
Wenmeng

Re: [PATCH 2/2] arm64: dts: qcom: qcs615: Enable camss for qcs615-adp-air

[Vladimir Zapolskiy]

Hi Wenmeng.

On 5/21/25 04:32, Wenmeng Liu wrote:
> 
> 
> On 2025/5/20 20:19, Vladimir Zapolskiy wrote:
>> Hello Wenmeng,
>>
>> On 5/20/25 11:56, Wenmeng Liu wrote:
>>> This change enables camera driver for QCS615 ADP AIR board.
>>
>> what is the rationale of enabling CAMSS on the board without giving any
>> description of any sensors connected to the SoC?
>>
> 
> Hi Vladimir,
> 
> We can perform validation through the CSID TPG(Test Pattern Generator),
> so I enabled CAMSS.
> 

Since this is just a test of CAMSS without any sensors/CSIPHY, then

1. camss-csiphy-3ph-1-0.c changes from the series have never been tested
    and added as dead code, it shall be removed from the series,
2. adding voltage regulators to the board dts is void and shall be removed.

Not to substitute but in addition to the above it's still doubtful, if just
a hardware/driver test configuration deserves to be added into the dts.

--
Best wishes,
Vladimir

Re: [PATCH 2/2] arm64: dts: qcom: qcs615: Enable camss for qcs615-adp-air

[Krzysztof Kozlowski]

On 21/05/2025 07:52, Vladimir Zapolskiy wrote:
>> We can perform validation through the CSID TPG(Test Pattern Generator),
>> so I enabled CAMSS.
>>
> 
> Since this is just a test of CAMSS without any sensors/CSIPHY, then
> 
> 1. camss-csiphy-3ph-1-0.c changes from the series have never been tested
>     and added as dead code, it shall be removed from the series,
> 2. adding voltage regulators to the board dts is void and shall be removed.
> 
> Not to substitute but in addition to the above it's still doubtful, if just
> a hardware/driver test configuration deserves to be added into the dts.
No, it does not deserve to be added. It's useless code in upstream. They
just want to push whatever they had downstream and drop their patch count.

Best regards,
Krzysztof

Re: [PATCH 2/2] arm64: dts: qcom: qcs615: Enable camss for qcs615-adp-air

[Dmitry Baryshkov]

On Wed, May 21, 2025 at 08:04:10AM +0200, Krzysztof Kozlowski wrote:
> On 21/05/2025 07:52, Vladimir Zapolskiy wrote:
> >> We can perform validation through the CSID TPG(Test Pattern Generator),
> >> so I enabled CAMSS.
> >>
> > 
> > Since this is just a test of CAMSS without any sensors/CSIPHY, then
> > 
> > 1. camss-csiphy-3ph-1-0.c changes from the series have never been tested
> >     and added as dead code, it shall be removed from the series,
> > 2. adding voltage regulators to the board dts is void and shall be removed.
> > 
> > Not to substitute but in addition to the above it's still doubtful, if just
> > a hardware/driver test configuration deserves to be added into the dts.
> No, it does not deserve to be added. It's useless code in upstream. They
> just want to push whatever they had downstream and drop their patch count.

I doubt that they had camss downstream.

-- 
With best wishes
Dmitry

Re: [PATCH 2/2] arm64: dts: qcom: qcs615: Enable camss for qcs615-adp-air

[Bryan O'Donoghue]

On 20/05/2025 09:56, Wenmeng Liu wrote:
> This change enables camera driver for QCS615 ADP AIR board.
> 
> Signed-off-by: Wenmeng Liu <quic_wenmliu@quicinc.com>
> ---
>   arch/arm64/boot/dts/qcom/qcs615-ride.dts | 7 +++++++
>   1 file changed, 7 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/qcs615-ride.dts b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
> index 2b5aa3c66867676bda59ff82b902b6e4974126f8..be8b829ec508d7de7a4cd6be6d1d4e83b09734bb 100644
> --- a/arch/arm64/boot/dts/qcom/qcs615-ride.dts
> +++ b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
> @@ -211,6 +211,13 @@ vreg_l17a: ldo17 {
>   	};
>   };
>   
> +&camss {
> +	vdda-phy-supply = <&vreg_l5a>;
> +	vdda-pll-supply = <&vreg_l12a>;
> +
> +	status = "ok";
> +};
> +
>   &gcc {
>   	clocks = <&rpmhcc RPMH_CXO_CLK>,
>   		 <&rpmhcc RPMH_CXO_CLK_A>,
> 

I think there's some confusion.

I'm willing to accept CSID and VFE changes with the minimum proof of TPG 
driving it.

But - CSIPHY in CAMSS which is only proven by TPG is obviously not a 
proof and again I agree with the consensus here - there's little value 
to an end-user in just having the TPG for a camera.

No sensor:
CAMSS::CSID
CAMSS::VFE

Just about acceptable

No sensor:
CAMSS::CSIPHY
DTS::CAMSS enable

Is too much of an ask.

Just publish your sensor code ! We need more sensor enablement upstream 
anyway.

---
bod

Re: [PATCH 2/2] arm64: dts: qcom: qcs615: Enable camss for qcs615-adp-air

[Dmitry Baryshkov]

On Wed, May 21, 2025 at 09:32:00AM +0800, Wenmeng Liu wrote:
> 
> 
> On 2025/5/20 20:19, Vladimir Zapolskiy wrote:
> > Hello Wenmeng,
> > 
> > On 5/20/25 11:56, Wenmeng Liu wrote:
> > > This change enables camera driver for QCS615 ADP AIR board.
> > 
> > what is the rationale of enabling CAMSS on the board without giving any
> > description of any sensors connected to the SoC?
> > 
> 
> Hi Vladimir,
> 
> We can perform validation through the CSID TPG(Test Pattern Generator), so I
> enabled CAMSS.

Are there any _actual_ cameras being a part of the RIDE platform? 

-- 
With best wishes
Dmitry

Re: [PATCH 2/2] arm64: dts: qcom: qcs615: Enable camss for qcs615-adp-air

[Wenmeng Liu]

On 2025/5/21 21:07, Bryan O'Donoghue wrote:
> On 20/05/2025 09:56, Wenmeng Liu wrote:
>> This change enables camera driver for QCS615 ADP AIR board.
>>
>> Signed-off-by: Wenmeng Liu <quic_wenmliu@quicinc.com>
>> ---
>>   arch/arm64/boot/dts/qcom/qcs615-ride.dts | 7 +++++++
>>   1 file changed, 7 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/qcs615-ride.dts b/arch/arm64/ 
>> boot/dts/qcom/qcs615-ride.dts
>> index 
>> 2b5aa3c66867676bda59ff82b902b6e4974126f8..be8b829ec508d7de7a4cd6be6d1d4e83b09734bb 100644
>> --- a/arch/arm64/boot/dts/qcom/qcs615-ride.dts
>> +++ b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
>> @@ -211,6 +211,13 @@ vreg_l17a: ldo17 {
>>       };
>>   };
>> +&camss {
>> +    vdda-phy-supply = <&vreg_l5a>;
>> +    vdda-pll-supply = <&vreg_l12a>;
>> +
>> +    status = "ok";
>> +};
>> +
>>   &gcc {
>>       clocks = <&rpmhcc RPMH_CXO_CLK>,
>>            <&rpmhcc RPMH_CXO_CLK_A>,
>>
> 
> I think there's some confusion.
> 
> I'm willing to accept CSID and VFE changes with the minimum proof of TPG 
> driving it.
> 
> But - CSIPHY in CAMSS which is only proven by TPG is obviously not a 
> proof and again I agree with the consensus here - there's little value 
> to an end-user in just having the TPG for a camera.
> 
> No sensor:
> CAMSS::CSID
> CAMSS::VFE
> 
> Just about acceptable
> 
> No sensor:
> CAMSS::CSIPHY
> DTS::CAMSS enable
> 
> Is too much of an ask.
> 
> Just publish your sensor code ! We need more sensor enablement upstream 
> anyway.
> 
> ---
> bod


Hi bryan,

I will upload the sensor code together in the next version.

Thanks,
Wenmeng

Re: [PATCH 1/2] arm64: dts: qcom: qcs615: Add support for camss

[Konrad Dybcio]

On 5/20/25 10:56 AM, Wenmeng Liu wrote:
> Add support for the camera subsystem on the QCS615 Qualcomm SoC. This
> includes bringing up the CSIPHY, CSID, VFE/RDI interfaces.
> 
> QCS615 provides
> - 2 x VFE, 3 RDI per VFE
> - 1 x VFE Lite, 4 RDI per VFE
> - 2 x CSID
> - 1 x CSID Lite
> - 3 x CSI PHY
> 
> Signed-off-by: Wenmeng Liu <quic_wenmliu@quicinc.com>
> ---

[...]

> +			clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>,
> +				 <&camcc CAM_CC_CPAS_AHB_CLK>,
> +				 <&camcc CAM_CC_CPHY_RX_CLK_SRC>,
> +				 <&camcc CAM_CC_CSIPHY0_CLK>,
> +				 <&camcc CAM_CC_CSI0PHYTIMER_CLK>,
> +				 <&camcc CAM_CC_CSIPHY1_CLK>,
> +				 <&camcc CAM_CC_CSI1PHYTIMER_CLK>,
> +				 <&camcc CAM_CC_CSIPHY2_CLK>,
> +				 <&camcc CAM_CC_CSI2PHYTIMER_CLK>,
> +				 <&gcc GCC_CAMERA_HF_AXI_CLK>,
> +				 <&camcc CAM_CC_SLOW_AHB_CLK_SRC>,
> +				 <&camcc CAM_CC_SOC_AHB_CLK>,
> +				 <&camcc CAM_CC_IFE_0_CLK>,
> +				 <&camcc CAM_CC_IFE_0_AXI_CLK>,
> +				 <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>,
> +				 <&camcc CAM_CC_IFE_0_CSID_CLK>,
> +				 <&camcc CAM_CC_IFE_0_CLK_SRC>,
> +				 <&camcc CAM_CC_IFE_1_CLK>,
> +				 <&camcc CAM_CC_IFE_1_AXI_CLK>,
> +				 <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>,
> +				 <&camcc CAM_CC_IFE_1_CSID_CLK>,
> +				 <&camcc CAM_CC_IFE_1_CLK_SRC>,
> +				 <&camcc CAM_CC_IFE_LITE_CLK>,
> +				 <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>,
> +				 <&camcc CAM_CC_IFE_LITE_CSID_CLK>,
> +				 <&camcc CAM_CC_IFE_LITE_CLK_SRC>;

Drop all _src clocks, the common clock framework has been handling
turning these on when their children need it for 13 years now :D

[...]

> +			interconnects = <&gem_noc MASTER_APPSS_PROC 0
> +					 &config_noc SLAVE_CAMERA_CFG 0>,

QCOM_ICC_TAG_ACTIVE_ONLY

> +					<&mmss_noc MASTER_CAMNOC_HF0 0
> +					 &mc_virt SLAVE_EBI1 0>;

QCOM_ICC_TAG_ALWAYS

> +			interconnect-names = "ahb",
> +					     "hf_0_mnoc";
> +
> +			interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>,
> +				     <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>,
> +				     <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>,
> +				     <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>,
> +				     <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>,
> +				     <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>,
> +				     <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>,
> +				     <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>,
> +				     <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>;
> +			interrupt-names = "csid0",
> +					  "csid1",
> +					  "csid_lite",
> +					  "csiphy0",
> +					  "csiphy1",
> +					  "csiphy2",
> +					  "vfe0",
> +					  "vfe1",
> +					  "vfe_lite";
> +
> +			iommus = <&apps_smmu 0x820 0x40>,
> +				 <&apps_smmu 0x840 0x0>,
> +				 <&apps_smmu 0x860 0x40>;

x1e defines a bunch more streams than its phy/csid count

plus entries 1 and 3 are equal after the mask is applied

(0x860 &~ 0x40 == 0x820 ~& 0x40 == 0x820)


Konrad