From: Bharata B Rao <bharata@amd.com>
To: <linux-kernel@vger.kernel.org>, <linux-mm@kvack.org>
Cc: <Jonathan.Cameron@huawei.com>, <dave.hansen@intel.com>,
<gourry@gourry.net>, <mgorman@techsingularity.net>,
<mingo@redhat.com>, <peterz@infradead.org>,
<raghavendra.kt@amd.com>, <riel@surriel.com>,
<rientjes@google.com>, <sj@kernel.org>, <weixugc@google.com>,
<willy@infradead.org>, <ying.huang@linux.alibaba.com>,
<ziy@nvidia.com>, <dave@stgolabs.net>, <nifan.cxl@gmail.com>,
<xuezhengchu@huawei.com>, <yiannis@zptcorp.com>,
<akpm@linux-foundation.org>, <david@kernel.org>,
<byungchul@sk.com>, <kinseyho@google.com>,
<joshua.hahnjy@gmail.com>, <yuanchu@google.com>,
<balbirs@nvidia.com>, <alok.rathore@samsung.com>,
<shivankg@amd.com>, <donettom@linux.ibm.com>
Subject: Re: [PATCH v8 8/8] x86/mm/ibs: Add runtime controls for IBS memprofiler
Date: Tue, 4 Aug 2026 10:50:51 +0530 [thread overview]
Message-ID: <2416cb3d-2bac-4fcf-a30f-21769b7da63e@amd.com> (raw)
In-Reply-To: <20260728054356.291998-9-bharata@amd.com>
[Reply to Shashiko review]
On 28-Jul-26 11:13 AM, Bharata B Rao wrote:
> diff --git a/arch/x86/mm/ibs-mprof.c b/arch/x86/mm/ibs-mprof.c
> index 923fb8f99552..07e0516db2ee 100644
> --- a/arch/x86/mm/ibs-mprof.c
> +++ b/arch/x86/mm/ibs-mprof.c
> /*
> * Record the IBS-reported access sample in percpu buffer.
> * Called from IBS interrupt handler.
> @@ -159,28 +199,55 @@ static inline void mprof_drain_cpu(unsigned int cpu)
> Does this code safely handle CPU hotplug teardown?
> During a CPU hotplug offline event, the high-priority stop_machine thread can
> preempt the mprof_work_handler worker mid-execution (for example, after
> reading head and tail).
> x86_amd_ibs_mprof_teardown() then locklessly zeroes head and tail via
> mprof_drain_cpu().
> When the CPU goes offline, the preempted worker thread is migrated to another
> CPU and resumes. Could it compute and write back its old tail value,
> desynchronizing tail from the newly reset head?
> This might cause the ring buffer to appear full of old or uninitialized
> samples, which are then passed to pghot_record_access(), potentially leading
> to wild page promotions or memory corruption in the pghot subsystem.
This comment is same as the one provided in 7/8 which has been replied-to there.
> +/*
> + * Publish a new config snapshot and push it to every online CPU
> + * immediately. Must be called with mprof_cfg_lock held.
> + */
> +static void mprof_publish(const struct mprof_config *newcfg)
> +{
> + struct mprof_config *slot;
> +
> + lockdep_assert_held(&mprof_cfg_lock);
> +
> + /* Fill the slot that is not currently published, then flip to it. */
> + slot = (mprof_cfg == &mprof_cfg_slots[0]) ?
> + &mprof_cfg_slots[1] : &mprof_cfg_slots[0];
> + *slot = *newcfg;
> Can this struct copy cause a data race with sysfs and debugfs readers?
>
> Because sysfs and debugfs attribute readers run in standard preemptible
> process context without locking, a reader task (like enabled_show) can execute
> smp_load_acquire() to get a pointer to the active slot and then be preempted.
>
> If a concurrent writer updates the configuration twice, it flips the active
> pointer back to the reused slot and directly overwrites its contents here via
> a plain struct copy.
>
> When the preempted reader resumes, it performs a plain C read concurrently
> with this struct assignment, which might result in a data race and torn reads
> of configuration fields.
Will fix this by adding mutex protection in the read side.
> + mprof_compose(slot);
> + /* Publish the fully composed slot; pairs with smp_load_acquire() in readers. */
> + smp_store_release(&mprof_cfg, slot);
> +
> + /*
> + * on_each_cpu() with wait serializes against any in-flight interrupt
> + * handler on each CPU, so the previously published slot has no readers
> + * once this returns and can be safely reused by the next writer.
> + */
> + on_each_cpu(mprof_reprogram_this_cpu, NULL, 1);
> Does this unconditionally arm the hardware profiler on all CPUs?
>
> In x86_amd_ibs_mprof_startup(), if setup_APIC_eilvt() fails to configure the
> APIC interrupt vector, the function logs a warning and returns 0, allowing the
> CPU to successfully come online without configuring its APIC routing for IBS.
>
> If the user enables the profiler via sysfs, this on_each_cpu() call executes
> mprof_enable_profiling() on all online CPUs, including any that failed setup.
>
> When the hardware sample overflows, will the CPU deliver the interrupt using
> the previously configured (or uninitialized) EILVT vector, potentially
> resulting in spurious interrupts delivered to other subsystems or a system
> panic?
I will prevent this situation (where failure from EILVT setup is observed from
online handler) by validating the EILVT offset at init time like how primary IBS
does.
> +static ssize_t enabled_show(struct device *dev,
> + struct device_attribute *attr, char *buf)
> +{
> + /* Acquire the snapshot; pairs with smp_store_release() in the writers. */
> + struct mprof_config *cfg = smp_load_acquire(&mprof_cfg);
> +
> + return sysfs_emit(buf, "%s\n", str_enabled_disabled(cfg->enabled));
> +}
> +
> +static ssize_t enabled_store(struct device *dev, struct device_attribute *attr,
> + const char *buf, size_t count)
> +{
> + struct mprof_config new;
> + bool enabled;
> + int ret;
> +
> + ret = kstrtobool(buf, &enabled);
> Does this break standard sysfs read-modify-write interactions?
>
> The enabled_show() function outputs the state using str_enabled_disabled(),
> which prints "enabled\n" or "disabled\n".
>
> However, kstrtobool() does not recognize "enabled" or "disabled" as valid
> boolean strings. As a result, standard boolean flag interactions like
> echo $(cat enabled) > enabled will fail with -EINVAL.
Doesn't look like.
kstrtobool() matches the first character, with the accepted set 'EeYyTt1DdNnFf0'
plus "on"/"off". So enabled with pass. Same with disabled.
Regards,
Bharata.
next prev parent reply other threads:[~2026-08-04 5:21 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-28 5:43 [PATCH v8 0/8] mm: Hot page tracking and promotion infrastructure Bharata B Rao
2026-07-28 5:43 ` [PATCH v8 1/8] mm: migrate: Allow misplaced migration without VMA Bharata B Rao
2026-07-28 5:43 ` [PATCH v8 2/8] mm: migrate: Add promote_misplaced_memcg_folios() Bharata B Rao
2026-07-30 6:34 ` Bharata B Rao
2026-07-28 5:43 ` [PATCH v8 3/8] mm: Hot page tracking and promotion - pghot Bharata B Rao
2026-07-31 16:14 ` Bharata B Rao
2026-07-28 5:43 ` [PATCH v8 4/8] mm: pghot: Precision mode for pghot Bharata B Rao
2026-07-31 16:27 ` Bharata B Rao
2026-07-28 5:43 ` [PATCH v8 5/8] mm: sched: move NUMA balancing tiering promotion to pghot Bharata B Rao
2026-08-03 8:23 ` Bharata B Rao
2026-07-28 5:43 ` [PATCH v8 6/8] x86/ibs: Move IBS caps definitions into its own header Bharata B Rao
2026-07-28 5:43 ` [PATCH v8 7/8] x86/mm/ibs: In-kernel driver for AMD IBS Memory Profiler Bharata B Rao
2026-08-04 5:00 ` Bharata B Rao
2026-07-28 5:43 ` [PATCH v8 8/8] x86/mm/ibs: Add runtime controls for IBS memprofiler Bharata B Rao
2026-08-04 5:20 ` Bharata B Rao [this message]
2026-07-28 5:55 ` [PATCH v8 0/8] mm: Hot page tracking and promotion infrastructure - microbenchmark numbers Bharata B Rao
2026-07-28 5:59 ` [PATCH v8 0/8] mm: Hot page tracking and promotion infrastructure - NAS BT Bharata B Rao
2026-07-28 6:02 ` [PATCH v8 0/8] mm: Hot page tracking and promotion infrastructure - Graph500 Bharata B Rao
2026-07-28 6:05 ` [PATCH v8 0/8] mm: Hot page tracking and promotion infrastructure - redis-memtier Bharata B Rao
2026-07-28 6:17 ` [PATCH v8 0/8] mm: Hot page tracking and promotion infrastructure - llama-bench Bharata B Rao
2026-07-28 18:14 ` [PATCH v8 0/8] mm: Hot page tracking and promotion infrastructure Andrew Morton
2026-07-28 18:24 ` Matthew Wilcox
2026-07-28 18:57 ` Gregory Price
2026-07-28 19:20 ` David Hildenbrand (Arm)
2026-07-28 19:59 ` Gregory Price
2026-07-29 11:45 ` Bharata B Rao
2026-07-29 9:35 ` Bharata B Rao
2026-07-29 13:54 ` SJ Park
2026-08-04 1:23 ` SJ Park
2026-08-06 5:49 ` Bharata B Rao
2026-08-06 13:44 ` SJ Park
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