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[86.58.6.171]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38f258b4158sm21289979f8f.3.2025.02.20.12.33.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Feb 2025 12:33:25 -0800 (PST) From: Jernej =?UTF-8?B?xaBrcmFiZWM=?= To: Vinod Koul , Kishon Vijay Abraham I , Chen-Yu Tsai , Samuel Holland , Philippe Simons , "open list:GENERIC PHY FRAMEWORK" , "moderated list:ARM/Allwinner sunXi SoC support" , "open list:ARM/Allwinner sunXi SoC support" , open list , Philippe Simons Subject: Re: [RFC PATCH 2/3] phy: override dr_mode for phy0 Date: Thu, 20 Feb 2025 21:33:24 +0100 Message-ID: <2428472.yKrmzQ4Hd0@jernej-laptop> In-Reply-To: <20250118102207.9339-2-simons.philippe@gmail.com> References: <20250118102207.9339-1-simons.philippe@gmail.com> <20250118102207.9339-2-simons.philippe@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Dne sobota, 18. januar 2025 ob 11:22:05 Srednjeevropski standardni =C4=8Das= je Philippe Simons napisal(a): > PHY0 mode is fully determined by the selected mux route. > Ignore changes requests from controllers. >=20 > Signed-off-by: Philippe Simons Some context is missing. Why is this patch needed? Which scenario causes issues without this patch? Please also provide cover letter to the series, with "big picture" explanat= ion. Best regards, Jernej > --- > drivers/phy/allwinner/phy-sun4i-usb.c | 12 ++++++++++++ > 1 file changed, 12 insertions(+) >=20 > diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinne= r/phy-sun4i-usb.c > index 24fbabe7a..f163b355e 100644 > --- a/drivers/phy/allwinner/phy-sun4i-usb.c > +++ b/drivers/phy/allwinner/phy-sun4i-usb.c > @@ -544,6 +544,18 @@ static int sun4i_usb_phy_set_mode(struct phy *_phy, > return -EINVAL; > } > =20 > + if (data->cfg->phy0_dual_route) { > + /* > + For SoCs with dual route the PHY mode is fully determined by=20 > + the selected mux route (i.e. USB controller to use). > + As both host (EHCI/OHCI) and peripheral (MUSB) controllers uses > + the same PHY, both drivers can try to set PHY mode. > + We need to ignore this requests, but not report error in case > + of valid mode values. > + */ > + return 0; > + } > + > if (new_mode !=3D data->dr_mode) { > dev_info(&_phy->dev, "Changing dr_mode to %d\n", new_mode); > data->dr_mode =3D new_mode; >=20