From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755190AbcIALRr (ORCPT ); Thu, 1 Sep 2016 07:17:47 -0400 Received: from mailout4.samsung.com ([203.254.224.34]:41565 "EHLO mailout4.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755146AbcIALRm (ORCPT ); Thu, 1 Sep 2016 07:17:42 -0400 X-AuditID: cbfee61b-f79466d000001e3c-f4-57c80e53b2e5 From: Bartlomiej Zolnierkiewicz To: Krzysztof Kozlowski Cc: javier@osg.samsung.com, Arnd Bergmann , Kukjin Kim , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 1/2] ARM: dts: exynos: Fix mismatched value for SD4 pull up/down configuration on exynos4210 Date: Thu, 01 Sep 2016 13:17:35 +0200 Message-id: <2498577.5hS2QaaMmd@amdc1976> User-Agent: KMail/4.13.3 (Linux/3.13.0-79-generic; KDE/4.13.3; x86_64; ; ) In-reply-to: <1472719022-27226-1-git-send-email-k.kozlowski@samsung.com> References: <1472719022-27226-1-git-send-email-k.kozlowski@samsung.com> MIME-version: 1.0 Content-transfer-encoding: 7Bit Content-type: text/plain; charset=us-ascii X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrNLMWRmVeSWpSXmKPExsVy+t9jQd1gvhPhBpeemFj8nXSM3WL+kXOs Fm/ermGyeP3C0KL/8Wtmi/PnN7BbbHp8jdXi8q45bBYzzu9jcuD0+P1rEqPHplWdbB6bl9R7 bOm/y+7Rt2UVo8fnTXIBbFFcNimpOZllqUX6dglcGWvuxxRM4634934+WwPjU64uRk4OCQET iZUXt7FB2GISF+6tB7K5OIQEZjFKtMw7wAzhfGWUWLjnJDtIFZuAlcTE9lWMILaIgKHEwd3b mUCKmAU6mCRWnf7LCpIQFiiSuHn4KxOIzSKgKvHr+hWwOK+ApsTeDefBmkUFvCR6tj8Csjk4 OAU8JHqP14GEhQTcJZ4/fMACUS4o8WPyPTCbWUBeYt/+qawQtpbE+p3HmSYwAp2JUDYLSdks JGULGJlXMUqkFiQXFCel5xrlpZbrFSfmFpfmpesl5+duYgRHwTPpHYyHd7kfYhTgYFTi4Z1h eTxciDWxrLgy9xCjBAezkghvNdeJcCHelMTKqtSi/Pii0pzU4kOM0hwsSuK8j/+vCxMSSE8s Sc1OTS1ILYLJMnFwSjUwql54mnX+q/ONX5W35utqyf4J2Jd/MY3Jy/jAo5OeTG9MbrboSJV5 v3LzOCqy5oB6mkBAq/v3ny8e7rewUNE6/DW26ET/1L7T6/cF5MoEGP1l8bzuFzDh8Zrr7L/4 Tgq8v+fin//sJ7dBvFJy7qH+O5m9cydWv77mw6xR805RNMv9UvmX1TvnK7EUZyQaajEXFScC APDtQZ1+AgAA Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Thursday, September 01, 2016 10:37:01 AM Krzysztof Kozlowski wrote: > The pinctrl pull up/down register on exynos4210 is 2-bit wide for each > pin and it accepts only values of 0, 1 and 3. The pins sd4-bus-width8 > were configured with value of 4. The driver does not validate the value > so this overflow effectively set a bit 1 in adjacent pins thus > configuring them to pull down. > > The author's intention was probably to set drive strength of 4x. All > other bus-widths pins are configured with pull up and drive strength of > 4x. Fix this one with same pattern. > > Fixes: 87711d8c7c70 ("ARM: dts: Add pinctrl node entries for SAMSUNG EXYNOS4210 SoC") > Signed-off-by: Krzysztof Kozlowski sd4_bus8 is currently unused by other drivers so there should be no problem with this change. Reviewed-by: Bartlomiej Zolnierkiewicz > --- > arch/arm/boot/dts/exynos4210-pinctrl.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi > index 8046340e50ac..d9b6d25e4abe 100644 > --- a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi > +++ b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi > @@ -649,7 +649,7 @@ > sd4_bus8: sd4-bus-width8 { > samsung,pins = "gpk1-3", "gpk1-4", "gpk1-5", "gpk1-6"; > samsung,pin-function = ; > - samsung,pin-pud = <4>; > + samsung,pin-pud = ; > samsung,pin-drv = ; > }; Best regards, -- Bartlomiej Zolnierkiewicz Samsung R&D Institute Poland Samsung Electronics