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From: Rik van Riel <riel@surriel.com>
To: Brendan Jackman <jackmanb@google.com>
Cc: x86@kernel.org, linux-kernel@vger.kernel.org, bp@alien8.de,
	 peterz@infradead.org, dave.hansen@linux.intel.com,
	zhengqi.arch@bytedance.com, 	nadav.amit@gmail.com,
	thomas.lendacky@amd.com, kernel-team@meta.com,
		linux-mm@kvack.org, akpm@linux-foundation.org, jannh@google.com,
		mhklinux@outlook.com, andrew.cooper3@citrix.com,
	Manali Shukla	 <Manali.Shukla@amd.com>
Subject: Re: [PATCH v9 06/12] x86/mm: use INVLPGB for kernel TLB flushes
Date: Mon, 10 Feb 2025 21:01:12 -0500	[thread overview]
Message-ID: <24daac05a52fbd62a98eaad2ff689a89615a8287.camel@surriel.com> (raw)
In-Reply-To: <CA+i-1C3LDJTf26WdBo7MvCdTs-dybqsUp3Ze7NowcOUHPWMXrg@mail.gmail.com>

On Fri, 2025-02-07 at 17:03 +0100, Brendan Jackman wrote:
> On Thu, 6 Feb 2025 at 05:45, Rik van Riel <riel@surriel.com> wrote:
> > diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c
> > index 36939b104561..227e972b6fbc 100644
> > --- a/arch/x86/mm/tlb.c
> > +++ b/arch/x86/mm/tlb.c
> > @@ -1086,6 +1086,30 @@ void flush_tlb_all(void)
> >         on_each_cpu(do_flush_tlb_all, NULL, 1);
> >  }
> > 
> > +static bool broadcast_kernel_range_flush(struct flush_tlb_info
> > *info)
> > +{
> > +       unsigned long addr;
> > +       unsigned long nr;
> > +
> > +       if (!IS_ENABLED(CONFIG_X86_BROADCAST_TLB_FLUSH))
> > +               return false;
> > +
> > +       if (!cpu_feature_enabled(X86_FEATURE_INVLPGB))
> > +               return false;
> 
> I think that first conditional can be shunted off into the header
> 
> diff --git a/arch/x86/include/asm/disabled-features.h
> b/arch/x86/include/asm/disabled-features.h
> index c492bdc97b05..61376b4e4fa7 100644
> --- a/arch/x86/include/asm/disabled-features.h
> +++ b/arch/x86/include/asm/disabled-features.h
> @@ -129,6 +129,12 @@
>  #define DISABLE_SEV_SNP                (1 << (X86_FEATURE_SEV_SNP &
> 31))
>  #endif
> 
> +#ifdef CONFIG_X86_BROADCAST_TLB_FLUSH
> +#define DISABLE_INVLPGB        0
> +#else
> +#define DISABLE_INVLPGB        (1 << (X86_FEATURE_INVLPGB & 31))
> +#endif
> +

I'm adding this for v10, with the disabled-features.h
stuff in patch 5, and removing the no longer needed
tests from each subsequent patch.

-- 
All Rights Reversed.

  parent reply	other threads:[~2025-02-11  2:01 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-06  4:43 [PATCH v9 00/12] AMD broadcast TLB invalidation Rik van Riel
2025-02-06  4:43 ` [PATCH v9 01/12] x86/mm: make MMU_GATHER_RCU_TABLE_FREE unconditional Rik van Riel
2025-02-07 14:28   ` Brendan Jackman
2025-02-11 11:07     ` Peter Zijlstra
2025-02-11 12:10       ` Brendan Jackman
2025-02-11 20:23         ` Rik van Riel
2025-02-06  4:43 ` [PATCH v9 02/12] x86/mm: remove pv_ops.mmu.tlb_remove_table call Rik van Riel
2025-02-06  4:43 ` [PATCH v9 03/12] x86/mm: consolidate full flush threshold decision Rik van Riel
2025-02-07 14:50   ` Brendan Jackman
2025-02-07 20:22     ` Rik van Riel
2025-02-10 11:15       ` Brendan Jackman
2025-02-10 19:12     ` Rik van Riel
2025-02-06  4:43 ` [PATCH v9 04/12] x86/mm: get INVLPGB count max from CPUID Rik van Riel
2025-02-07 15:10   ` Brendan Jackman
2025-02-07 17:34     ` Brendan Jackman
     [not found]   ` <CAPguPOhWYV4dKZBm7-bFknDa2Ct5L1Bxc5K+Acox0FM1aAgiww@mail.gmail.com>
2025-02-10 16:48     ` Rik van Riel
     [not found]       ` <4f63d409-89c0-412b-8d69-371261f305ea@gmail.com>
2025-02-12 15:56         ` Tom Lendacky
2025-02-06  4:43 ` [PATCH v9 05/12] x86/mm: add INVLPGB support code Rik van Riel
2025-02-06  4:43 ` [PATCH v9 06/12] x86/mm: use INVLPGB for kernel TLB flushes Rik van Riel
2025-02-07 16:03   ` Brendan Jackman
2025-02-07 20:50     ` Rik van Riel
2025-02-10 11:22       ` Brendan Jackman
2025-02-11  2:01     ` Rik van Riel [this message]
2025-02-06  4:43 ` [PATCH v9 07/12] x86/mm: use INVLPGB in flush_tlb_all Rik van Riel
2025-02-06  4:43 ` [PATCH v9 08/12] x86/mm: use broadcast TLB flushing for page reclaim TLB flushing Rik van Riel
2025-02-06  4:43 ` [PATCH v9 09/12] x86/mm: enable broadcast TLB invalidation for multi-threaded processes Rik van Riel
2025-02-10 14:15   ` Brendan Jackman
2025-02-11  3:07     ` Rik van Riel
2025-02-06  4:43 ` [PATCH v9 10/12] x86/mm: do targeted broadcast flushing from tlbbatch code Rik van Riel
2025-02-10 15:27   ` Brendan Jackman
2025-02-11  3:45     ` Rik van Riel
2025-02-11 10:02       ` Brendan Jackman
2025-02-11 20:21         ` Rik van Riel
2025-02-12 10:38           ` Brendan Jackman
2025-02-06  4:43 ` [PATCH v9 11/12] x86/mm: enable AMD translation cache extensions Rik van Riel
2025-02-06  4:43 ` [PATCH v9 12/12] x86/mm: only invalidate final translations with INVLPGB Rik van Riel
2025-02-06 10:16 ` [PATCH v9 00/12] AMD broadcast TLB invalidation Oleksandr Natalenko
2025-02-06 14:16   ` Rik van Riel
2025-02-06 14:23     ` Peter Zijlstra
2025-02-06 14:48       ` Rik van Riel
2025-02-07  8:16         ` Peter Zijlstra
2025-02-07 17:46           ` Rik van Riel
2025-02-07 18:23 ` Brendan Jackman

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