From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753017AbZIBTef (ORCPT ); Wed, 2 Sep 2009 15:34:35 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1752734AbZIBTef (ORCPT ); Wed, 2 Sep 2009 15:34:35 -0400 Received: from kuber.nabble.com ([216.139.236.158]:53658 "EHLO kuber.nabble.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752516AbZIBTee (ORCPT ); Wed, 2 Sep 2009 15:34:34 -0400 Message-ID: <25264284.post@talk.nabble.com> Date: Wed, 2 Sep 2009 12:34:37 -0700 (PDT) From: Jerry Kuo To: linux-kernel@vger.kernel.org Subject: USING S3C2412 NAND controler NFECCERR0 ECC0/1 status Register MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Nabble-From: sxk68@yahoo.com Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Does anyone have experience using S3C2412 existing ECC detecting register successfully?(NFECCERR0/1). According to the S3C2412X Manual, NFECCERR0 can indicate whether main data area bit fail eror occured. Thanks Jerry Kuo -- View this message in context: http://www.nabble.com/USING-S3C2412-NAND-controler-NFECCERR0-ECC0-1-status-Register-tp25264284p25264284.html Sent from the linux-kernel mailing list archive at Nabble.com.