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From: Reinette Chatre <reinette.chatre@intel.com>
To: <shuah@kernel.org>, <Dave.Martin@arm.com>, <james.morse@arm.com>,
	<tony.luck@intel.com>, <babu.moger@amd.com>,
	<ilpo.jarvinen@linux.intel.com>,
	Shuah Khan <skhan@linuxfoundation.org>
Cc: <fenghuay@nvidia.com>, <peternewman@google.com>,
	<zide.chen@intel.com>, <dapeng1.mi@linux.intel.com>,
	<ben.horgan@arm.com>, <yu.c.chen@intel.com>,
	<jason.zeng@intel.com>, <linux-kselftest@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <patches@lists.linux.dev>
Subject: Re: [PATCH v4 00/10] selftests/resctrl: Fixes and improvements focused on Intel platforms
Date: Mon, 4 May 2026 15:57:22 -0700	[thread overview]
Message-ID: <2598acd3-542f-4c90-b46d-dc64c6cdc700@intel.com> (raw)
In-Reply-To: <cover.1775266384.git.reinette.chatre@intel.com>

Hi Shuah,

I confirmed that this series continues to apply cleanly to current HEAD [1] of the
kselftest repo's "next" branch.
Could you please consider this series for inclusion?

Thank you very much

Reinette

[1] commit bb86954a672e ("docs: kselftest: Document the FORCE_TARGETS build variable")

On 4/3/26 6:55 PM, Reinette Chatre wrote:
> Hi Shuah,
> 
> Could you please consider this series for inclusion?
> 
> No problem if you already took v3. There have been no functional changes since v3.
> 
> Thank you very much,
> 
> Reinette
> 
> Changes since v3:
> - v3: https://lore.kernel.org/lkml/cover.1773432891.git.reinette.chatre@intel.com/
> - No functional changes.
> - Start sentence in changelog using upper case. (Ilpo)
> - Add Reviewed-by tags.
> 
> Changes since v2:
> - v2: https://lore.kernel.org/linux-patches/cover.1772582958.git.reinette.chatre@intel.com/
> - Rebased on top of v7.0-rc3.
> - Split "selftests/resctrl: Improve accuracy of cache occupancy test" into
>   changes impacting L3 and L2 respectively. (Ilpo)
> - "long_mask" -> "full_mask", "return_value" -> "measurement", "org_count"
>   -> "orig_count". (Ilpo)
> - Use PATH_MAX where appropriate. (Ilpo)
> - Handle errors first to reduce indentation. (Ilpo)
> - Detailed changes in changelogs.
> - No functional changes since v2. Series tested by running 20 iterations of all
>   tests on Emerald Rapids, Granite Rapids, Sapphire Rapids, Ice Lake, Sierra
>   Forest, and Broadwell.
> 
> Changes since v1:
> - v1: https://lore.kernel.org/lkml/cover.1770406608.git.reinette.chatre@intel.com/
> - The new perf interface that resctrl selftests can utilize has been accepted and
>   merged into v7.0-rc2. This series can thus now be considered for inclusion.
>   For reference,
>   commit 6a8a48644c4b ("perf/x86/intel/uncore: Add per-scheduler IMC CAS count events")
>   The resctrl selftest changes making use of the new perf interface are backward
>   compatible. The selftests do not require a v7.0-rc2 kernel to run but the
>   tests can only pass on recent Intel platforms running v7.0-rc2 or later.
> - Combine the two outstanding resctrl selftest submissions into one series
>   for easier tracking:
>   https://lore.kernel.org/lkml/084e82b5c29d75f16f24af8768d50d39ba0118a5.1769101788.git.reinette.chatre@intel.com/
>   https://lore.kernel.org/lkml/cover.1770406608.git.reinette.chatre@intel.com/
> - Fix typo in changelog of "selftests/resctrl: Improve accuracy of cache
>   occupancy test": "the data my be in L2" -> "the data may be in L2"
> - Add Zide Chen's RB tags.
> 
> Cover letter updated to be accurate wrt perf changes:
> 
> The resctrl selftests fail on recent Intel platforms. Intermittent failures
> in the CAT test and permanent failures of MBM and MBA tests on new platforms
> like Sierra Forest and Granite Rapids.
> 
> The MBM and MBA resctrl selftests both generate memory traffic and compare the
> memory bandwidth measurements between the iMC PMUs and MBM to determine pass or
> fail. Both these tests are failing on recent platforms like Sierra Forest and
> Granite Rapids that have two events that need to be read and combined
> for a total memory bandwidth count instead of the single event available on
> earlier platforms.
> 
> resctrl selftests prefer to obtain event details via sysfs instead of adding
> model specific details on which events to read. Enhancements to perf to expose
> the new event details are available since:
>  commit 6a8a48644c4b ("perf/x86/intel/uncore: Add per-scheduler IMC CAS count events")
> This series demonstrates use of the new sysfs interface to perf
> to obtain accurate iMC read memory bandwidth measurements.
> 
> An additional issue with all the tests is that these selftests are part
> performance tests and determine pass/fail on performance heuristics selected
> after running the tests on a variety of platforms. When new platforms
> arrive the previous heuristics may cause the tests to fail. These failures are
> not because of an issue with the resctrl subsystem the tests intend to test
> but because of the architectural changes in the new platforms.
> 
> Adapt the resctrl tests to not be as sensitive to architectural changes
> while adjusting the remaining heuristics to ensure tests pass on a variety
> of platforms. More details in individual patches.
> 
> Tested by running 100 iterations of all tests on Emerald Rapids, Granite
> Rapids, Sapphire Rapids, Ice Lake, Sierra Forest, and Broadwell.
> 
> Reinette Chatre (10):
>   selftests/resctrl: Improve accuracy of cache occupancy test
>   selftests/resctrl: Reduce interference from L2 occupancy during cache
>     occupancy test
>   selftests/resctrl: Do not store iMC counter value in counter config
>     structure
>   selftests/resctrl: Prepare for parsing multiple events per iMC
>   selftests/resctrl: Support multiple events associated with iMC
>   selftests/resctrl: Increase size of buffer used in MBM and MBA tests
>   selftests/resctrl: Raise threshold at which MBM and PMU values are
>     compared
>   selftests/resctrl: Remove requirement on cache miss rate
>   selftests/resctrl: Simplify perf usage in CAT test
>   selftests/resctrl: Reduce L2 impact on CAT test
> 
>  tools/testing/selftests/resctrl/cache.c       |  30 ++--
>  tools/testing/selftests/resctrl/cat_test.c    |  41 ++----
>  tools/testing/selftests/resctrl/cmt_test.c    |  36 ++++-
>  tools/testing/selftests/resctrl/fill_buf.c    |   4 +-
>  tools/testing/selftests/resctrl/mba_test.c    |   6 +-
>  tools/testing/selftests/resctrl/mbm_test.c    |   6 +-
>  tools/testing/selftests/resctrl/resctrl.h     |  20 ++-
>  tools/testing/selftests/resctrl/resctrl_val.c | 135 +++++++++++++-----
>  8 files changed, 179 insertions(+), 99 deletions(-)
> 


  parent reply	other threads:[~2026-05-04 22:57 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-04  1:55 [PATCH v4 00/10] selftests/resctrl: Fixes and improvements focused on Intel platforms Reinette Chatre
2026-04-04  1:56 ` [PATCH v4 01/10] selftests/resctrl: Improve accuracy of cache occupancy test Reinette Chatre
2026-04-04  1:56 ` [PATCH v4 02/10] selftests/resctrl: Reduce interference from L2 occupancy during " Reinette Chatre
2026-04-04  1:56 ` [PATCH v4 03/10] selftests/resctrl: Do not store iMC counter value in counter config structure Reinette Chatre
2026-04-04  1:56 ` [PATCH v4 04/10] selftests/resctrl: Prepare for parsing multiple events per iMC Reinette Chatre
2026-04-04  1:56 ` [PATCH v4 05/10] selftests/resctrl: Support multiple events associated with iMC Reinette Chatre
2026-04-04  1:56 ` [PATCH v4 06/10] selftests/resctrl: Increase size of buffer used in MBM and MBA tests Reinette Chatre
2026-04-04  1:56 ` [PATCH v4 07/10] selftests/resctrl: Raise threshold at which MBM and PMU values are compared Reinette Chatre
2026-04-04  1:56 ` [PATCH v4 08/10] selftests/resctrl: Remove requirement on cache miss rate Reinette Chatre
2026-04-04  1:56 ` [PATCH v4 09/10] selftests/resctrl: Simplify perf usage in CAT test Reinette Chatre
2026-04-04  1:56 ` [PATCH v4 10/10] selftests/resctrl: Reduce L2 impact on " Reinette Chatre
2026-05-04 22:57 ` Reinette Chatre [this message]
2026-05-04 23:12   ` [PATCH v4 00/10] selftests/resctrl: Fixes and improvements focused on Intel platforms Shuah Khan
2026-05-05  3:47     ` Reinette Chatre

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