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auth=pass (PLAIN) smtp.auth=ferry.toth@elsinga.info; spf=softfail smtp.mailfrom=gmail.com; dmarc=skipped header.from=gmail.com; arc=none Received: from cust-178-250-146-69.breedbanddelft.nl ([178.250.146.69] helo=smtp) by s198.webhostingserver.nl with esmtpa (Exim 4.98) (envelope-from ) id 1srZNC-0000000ATGh-39pO; Fri, 20 Sep 2024 10:52:18 +0200 From: Ferry Toth To: Serge Semin , Andy Shevchenko Cc: Viresh Kumar , Vinod Koul , Greg Kroah-Hartman , dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: Re: [PATCH v2] dmaengine: dw: Select only supported masters for ACPI devices Date: Fri, 20 Sep 2024 10:52:18 +0200 Message-ID: <2627811.Lt9SDvczpP@ferry-quad> In-Reply-To: References: <20240919135854.16124-1-fancer.lancer@gmail.com> <20240919185151.7331-1-fancer.lancer@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; boundary="nextPart2210023.Mh6RI2rZIc"; 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X-ACL-Warn: From-header domain ( gmail.com} ) must match your domain name used in authenticated email user ( ferry.toth@elsinga.info ) X-Antivirus-Scanner: Clean mail though you should still use an Antivirus --nextPart2210023.Mh6RI2rZIc Content-Type: multipart/alternative; boundary="nextPart4379146.ejJDZkT8p0"; protected-headers="v1" Content-Transfer-Encoding: 7Bit From: Ferry Toth Date: Fri, 20 Sep 2024 10:52:18 +0200 Message-ID: <2627811.Lt9SDvczpP@ferry-quad> In-Reply-To: MIME-Version: 1.0 This is a multi-part message in MIME format. --nextPart4379146.ejJDZkT8p0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="UTF-8" Hi, Op donderdag 19 september 2024 22:06:24 CEST schreef Andy Shevchenko: > On Thu, Sep 19, 2024 at 09:51:48PM +0300, Serge Semin wrote: > > The recently submitted fix-commit revealed a problem in the iDMA32 > > platform code. Even though the controller supported only a single master > > the dw_dma_acpi_filter() method hard-coded two master interfaces with I= Ds > > 0 and 1. As a result the sanity check implemented in the commit > > b336268dde75 ("dmaengine: dw: Add peripheral bus width verification") g= ot > > incorrect interface data width and thus prevented the client drivers > > from configuring the DMA-channel with the EINVAL error returned. E.g. t= he > > next error was printed for the PXA2xx SPI controller driver trying to > > configure the requested channels: > >=20 > > > [ 164.525604] pxa2xx_spi_pci 0000:00:07.1: DMA slave config failed > > > [ 164.536105] pxa2xx_spi_pci 0000:00:07.1: failed to get DMA TX desc= riptor > > > [ 164.543213] spidev spi-SPT0001:00: SPI transfer failed: -16 > >=20 > > The problem would have been spotted much earlier if the iDMA32 controll= er > > supported more than one master interfaces. But since it supports just a > > single master and the iDMA32-specific code just ignores the master IDs = in > > the CTLLO preparation method, the issue has been gone unnoticed so far. > >=20 > > Fix the problem by specifying a single master ID for both memory and > > peripheral devices on the ACPI-based platforms if there is only one mas= ter > > available on the controller. Thus the issue noticed for the iDMA32 > > controllers will be eliminated and the ACPI-probed DW DMA controllers w= ill > > be configured with the correct master ID by default. >=20 > Tested-by: Andy Shevchenko > Seems this fixes the bug I have seen. > Ferry, can you confirm? I was testing something else and broke my setup :-( I=E2=80=99ll fix that = and test this patch this weekend. --nextPart4379146.ejJDZkT8p0 Content-Transfer-Encoding: quoted-printable Content-Type: text/html; charset="UTF-8"

Hi,


Op donderdag 19 september 2024 22:06:24 CEST schreef Andy Shevchenko:

>= ; On Thu, Sep 19, 2024 at 09:51:48PM +0300, Serge Semin wrote:

>= ; > The recently submitted fix-commit revealed a problem in the iDMA32

>= ; > platform code. Even though the controller supported only a single ma= ster

>= ; > the dw_dma_acpi_filter() method hard-coded two master interfaces wit= h IDs

>= ; > 0 and 1. As a result the sanity check implemented in the commit

>= ; > b336268dde75 ("dmaengine: dw: Add peripheral bus width verifica= tion") got

>= ; > incorrect interface data width and thus prevented the client drivers=

>= ; > from configuring the DMA-channel with the EINVAL error returned. E.g= =2E the

>= ; > next error was printed for the PXA2xx SPI controller driver trying t= o

>= ; > configure the requested channels:

>= ; >

>= ; > > [  164.525604] pxa2xx_spi_pci 0000:00:07.1: DMA slave conf= ig failed

>= ; > > [  164.536105] pxa2xx_spi_pci 0000:00:07.1: failed to get = DMA TX descriptor

>= ; > > [  164.543213] spidev spi-SPT0001:00: SPI transfer failed:= -16

>= ; >

>= ; > The problem would have been spotted much earlier if the iDMA32 contr= oller

>= ; > supported more than one master interfaces. But since it supports jus= t a

>= ; > single master and the iDMA32-specific code just ignores the master I= Ds in

>= ; > the CTLLO preparation method, the issue has been gone unnoticed so f= ar.

>= ; >

>= ; > Fix the problem by specifying a single master ID for both memory and=

>= ; > peripheral devices on the ACPI-based platforms if there is only one = master

>= ; > available on the controller. Thus the issue noticed for the iDMA32

>= ; > controllers will be eliminated and the ACPI-probed DW DMA controller= s will

>= ; > be configured with the correct master ID by default.

>= ;

>= ; Tested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

>= ; Seems this fixes the bug I have seen.

>= ; Ferry, can you confirm?

I w= as testing something else and broke my setup :-(  I=E2=80=99ll fix tha= t and test this patch this weekend.




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