Locking interrupt handler in L1 cache

[Parav Pandit <paravpandit@yahoo.com>]

Hi,

I have MPC 8548 Linux 2.6.x based firewall which will
mostly do packet processing for 80% time.
So obviously most of the time it will RX and TX
packets through gianfar ethernet driver.

I want to lock my interrupt handler of this driver in
the L1 cache.

1. Is there any kernel API for locking function and
data to lock them in the L1/L2 cache?

2. How can I use "icbtls" - Instruction Cache Block
Touch and Lock Set" for locking my interrupt handler?

3. Is "icbtls" is the correct instruction at which I
am looking at?

4. How do I find end address of the interrupt handler
function and how do we pass it to cache locking
instructions? (Because it can happen that interrupt
handler size is more than a cache line, not aligned
etc)?

5. Can we enhance request_irq() function to take an
additional parameter to lock the interrupt handler in
the cache?

I understand that if my interrupt handler is going to
be called most of the time then it is very likely to
happen that OS will flush the same, but there is no
guarantee for it.

Regards,
Parav Pandit



 
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