From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 365FDC43387 for ; Thu, 10 Jan 2019 08:43:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 060A821773 for ; Thu, 10 Jan 2019 08:43:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727651AbfAJInD (ORCPT ); Thu, 10 Jan 2019 03:43:03 -0500 Received: from gloria.sntech.de ([185.11.138.130]:53826 "EHLO gloria.sntech.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726605AbfAJInC (ORCPT ); Thu, 10 Jan 2019 03:43:02 -0500 Received: from ip5f5a6320.dynamic.kabel-deutschland.de ([95.90.99.32] helo=diego.localnet) by gloria.sntech.de with esmtpsa (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1ghVvW-00025J-7P; Thu, 10 Jan 2019 09:42:58 +0100 From: Heiko =?ISO-8859-1?Q?St=FCbner?= To: Rob Herring Cc: arm@kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Matthias Brugger , linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-tegra@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-rockchip@lists.infradead.org, Mark Rutland , Will Deacon Subject: Re: [PATCH] arm64: dts: Remove inconsistent use of 'arm,armv8' compatible string Date: Thu, 10 Jan 2019 09:42:57 +0100 Message-ID: <2664471.Eeqcqp8LJD@diego> In-Reply-To: <20190109202934.29304-1-robh@kernel.org> References: <20190109202934.29304-1-robh@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Am Mittwoch, 9. Januar 2019, 21:29:34 CET schrieb Rob Herring: > The 'arm,armv8' compatible string is only for software models. It adds > little value otherwise and is inconsistently used as a fallback on some > platforms. Remove it from those platforms. > > This fixes warnings generated by the DT schema. > > Reported-by: Michal Simek > Cc: Mark Rutland > Cc: Will Deacon > Signed-off-by: Rob Herring > --- For the Rockchip-parts Acked-by: Heiko Stuebner > diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi > b/arch/arm64/boot/dts/rockchip/px30.dtsi index 9aa8d5ef9e45..eb992d60e6ba > 100644 > --- a/arch/arm64/boot/dts/rockchip/px30.dtsi > +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi > @@ -40,7 +40,7 @@ > > cpu0: cpu@0 { > device_type = "cpu"; > - compatible = "arm,cortex-a35", "arm,armv8"; > + compatible = "arm,cortex-a35"; > reg = <0x0 0x0>; > enable-method = "psci"; > clocks = <&cru ARMCLK>; > @@ -52,7 +52,7 @@ > > cpu1: cpu@1 { > device_type = "cpu"; > - compatible = "arm,cortex-a35", "arm,armv8"; > + compatible = "arm,cortex-a35"; > reg = <0x0 0x1>; > enable-method = "psci"; > clocks = <&cru ARMCLK>; > @@ -64,7 +64,7 @@ > > cpu2: cpu@2 { > device_type = "cpu"; > - compatible = "arm,cortex-a35", "arm,armv8"; > + compatible = "arm,cortex-a35"; > reg = <0x0 0x2>; > enable-method = "psci"; > clocks = <&cru ARMCLK>; > @@ -76,7 +76,7 @@ > > cpu3: cpu@3 { > device_type = "cpu"; > - compatible = "arm,cortex-a35", "arm,armv8"; > + compatible = "arm,cortex-a35"; > reg = <0x0 0x3>; > enable-method = "psci"; > clocks = <&cru ARMCLK>; > diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi > b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index ecd7f19c3542..0f72bb33ce86 > 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi > @@ -37,7 +37,7 @@ > > cpu0: cpu@0 { > device_type = "cpu"; > - compatible = "arm,cortex-a53", "arm,armv8"; > + compatible = "arm,cortex-a53"; > reg = <0x0 0x0>; > clocks = <&cru ARMCLK>; > #cooling-cells = <2>; > @@ -49,7 +49,7 @@ > > cpu1: cpu@1 { > device_type = "cpu"; > - compatible = "arm,cortex-a53", "arm,armv8"; > + compatible = "arm,cortex-a53"; > reg = <0x0 0x1>; > clocks = <&cru ARMCLK>; > #cooling-cells = <2>; > @@ -61,7 +61,7 @@ > > cpu2: cpu@2 { > device_type = "cpu"; > - compatible = "arm,cortex-a53", "arm,armv8"; > + compatible = "arm,cortex-a53"; > reg = <0x0 0x2>; > clocks = <&cru ARMCLK>; > #cooling-cells = <2>; > @@ -73,7 +73,7 @@ > > cpu3: cpu@3 { > device_type = "cpu"; > - compatible = "arm,cortex-a53", "arm,armv8"; > + compatible = "arm,cortex-a53"; > reg = <0x0 0x3>; > clocks = <&cru ARMCLK>; > #cooling-cells = <2>; > diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi > b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index 7014d10b954c..06e7c31d7d07 > 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi > @@ -73,7 +73,7 @@ > > cpu_l0: cpu@0 { > device_type = "cpu"; > - compatible = "arm,cortex-a53", "arm,armv8"; > + compatible = "arm,cortex-a53"; > reg = <0x0 0x0>; > enable-method = "psci"; > #cooling-cells = <2>; /* min followed by max */ > @@ -81,7 +81,7 @@ > > cpu_l1: cpu@1 { > device_type = "cpu"; > - compatible = "arm,cortex-a53", "arm,armv8"; > + compatible = "arm,cortex-a53"; > reg = <0x0 0x1>; > enable-method = "psci"; > #cooling-cells = <2>; /* min followed by max */ > @@ -89,7 +89,7 @@ > > cpu_l2: cpu@2 { > device_type = "cpu"; > - compatible = "arm,cortex-a53", "arm,armv8"; > + compatible = "arm,cortex-a53"; > reg = <0x0 0x2>; > enable-method = "psci"; > #cooling-cells = <2>; /* min followed by max */ > @@ -97,7 +97,7 @@ > > cpu_l3: cpu@3 { > device_type = "cpu"; > - compatible = "arm,cortex-a53", "arm,armv8"; > + compatible = "arm,cortex-a53"; > reg = <0x0 0x3>; > enable-method = "psci"; > #cooling-cells = <2>; /* min followed by max */ > @@ -105,7 +105,7 @@ > > cpu_b0: cpu@100 { > device_type = "cpu"; > - compatible = "arm,cortex-a53", "arm,armv8"; > + compatible = "arm,cortex-a53"; > reg = <0x0 0x100>; > enable-method = "psci"; > #cooling-cells = <2>; /* min followed by max */ > @@ -113,7 +113,7 @@ > > cpu_b1: cpu@101 { > device_type = "cpu"; > - compatible = "arm,cortex-a53", "arm,armv8"; > + compatible = "arm,cortex-a53"; > reg = <0x0 0x101>; > enable-method = "psci"; > #cooling-cells = <2>; /* min followed by max */ > @@ -121,7 +121,7 @@ > > cpu_b2: cpu@102 { > device_type = "cpu"; > - compatible = "arm,cortex-a53", "arm,armv8"; > + compatible = "arm,cortex-a53"; > reg = <0x0 0x102>; > enable-method = "psci"; > #cooling-cells = <2>; /* min followed by max */ > @@ -129,7 +129,7 @@ > > cpu_b3: cpu@103 { > device_type = "cpu"; > - compatible = "arm,cortex-a53", "arm,armv8"; > + compatible = "arm,cortex-a53"; > reg = <0x0 0x103>; > enable-method = "psci"; > #cooling-cells = <2>; /* min followed by max */ > diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi > b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 6cc1c9fa4ea6..db9d948c0b03 > 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi > @@ -68,7 +68,7 @@ > > cpu_l0: cpu@0 { > device_type = "cpu"; > - compatible = "arm,cortex-a53", "arm,armv8"; > + compatible = "arm,cortex-a53"; > reg = <0x0 0x0>; > enable-method = "psci"; > clocks = <&cru ARMCLKL>; > @@ -79,7 +79,7 @@ > > cpu_l1: cpu@1 { > device_type = "cpu"; > - compatible = "arm,cortex-a53", "arm,armv8"; > + compatible = "arm,cortex-a53"; > reg = <0x0 0x1>; > enable-method = "psci"; > clocks = <&cru ARMCLKL>; > @@ -90,7 +90,7 @@ > > cpu_l2: cpu@2 { > device_type = "cpu"; > - compatible = "arm,cortex-a53", "arm,armv8"; > + compatible = "arm,cortex-a53"; > reg = <0x0 0x2>; > enable-method = "psci"; > clocks = <&cru ARMCLKL>; > @@ -101,7 +101,7 @@ > > cpu_l3: cpu@3 { > device_type = "cpu"; > - compatible = "arm,cortex-a53", "arm,armv8"; > + compatible = "arm,cortex-a53"; > reg = <0x0 0x3>; > enable-method = "psci"; > clocks = <&cru ARMCLKL>; > @@ -112,7 +112,7 @@ > > cpu_b0: cpu@100 { > device_type = "cpu"; > - compatible = "arm,cortex-a72", "arm,armv8"; > + compatible = "arm,cortex-a72"; > reg = <0x0 0x100>; > enable-method = "psci"; > clocks = <&cru ARMCLKB>; > @@ -123,7 +123,7 @@ > > cpu_b1: cpu@101 { > device_type = "cpu"; > - compatible = "arm,cortex-a72", "arm,armv8"; > + compatible = "arm,cortex-a72"; > reg = <0x0 0x101>; > enable-method = "psci"; > clocks = <&cru ARMCLKB>;