From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EAD68C3DA7D for ; Tue, 3 Jan 2023 08:35:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237049AbjACIe7 (ORCPT ); Tue, 3 Jan 2023 03:34:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52598 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233033AbjACIey (ORCPT ); Tue, 3 Jan 2023 03:34:54 -0500 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4F7DA9596 for ; Tue, 3 Jan 2023 00:34:51 -0800 (PST) Received: from ip5b412258.dynamic.kabel-deutschland.de ([91.65.34.88] helo=diego.localnet) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1pCckn-0004ze-Ue; Tue, 03 Jan 2023 09:34:37 +0100 From: Heiko =?ISO-8859-1?Q?St=FCbner?= To: Paul Walmsley , Palmer Dabbelt , Albert Ou , Guo Ren , Nathan Chancellor , Icenowy Zheng Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Icenowy Zheng , Sergey Matyukevich Subject: Re: [PATCH RESEND 1/2] riscv: errata: fix T-Head dcache.cva encoding Date: Tue, 03 Jan 2023 09:34:37 +0100 Message-ID: <2668919.mvXUDI8C0e@diego> In-Reply-To: <20230103062610.69704-1-uwu@icenowy.me> References: <20230103062610.69704-1-uwu@icenowy.me> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Am Dienstag, 3. Januar 2023, 07:26:09 CET schrieb Icenowy Zheng: > The dcache.cva encoding shown in the comments are wrong, it's for > dcache.cval1 (which is restricted to L1) instead. > > Fix this in the comment and in the hardcoded instruction. > > Signed-off-by: Icenowy Zheng > Tested-by: Sergey Matyukevich Reviewed-by: Heiko Stuebner Original was on https://lore.kernel.org/all/5894419.tdWV9SEqCh@phil/ > --- > Included when resending: > - Sergey's Tested-by tag. > > arch/riscv/include/asm/errata_list.h | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h > index 4180312d2a70..605800bd390e 100644 > --- a/arch/riscv/include/asm/errata_list.h > +++ b/arch/riscv/include/asm/errata_list.h > @@ -102,7 +102,7 @@ asm volatile(ALTERNATIVE( \ > * | 31 - 25 | 24 - 20 | 19 - 15 | 14 - 12 | 11 - 7 | 6 - 0 | > * 0000001 01001 rs1 000 00000 0001011 > * dcache.cva rs1 (clean, virtual address) > - * 0000001 00100 rs1 000 00000 0001011 > + * 0000001 00101 rs1 000 00000 0001011 > * > * dcache.cipa rs1 (clean then invalidate, physical address) > * | 31 - 25 | 24 - 20 | 19 - 15 | 14 - 12 | 11 - 7 | 6 - 0 | > @@ -115,7 +115,7 @@ asm volatile(ALTERNATIVE( \ > * 0000000 11001 00000 000 00000 0001011 > */ > #define THEAD_inval_A0 ".long 0x0265000b" > -#define THEAD_clean_A0 ".long 0x0245000b" > +#define THEAD_clean_A0 ".long 0x0255000b" > #define THEAD_flush_A0 ".long 0x0275000b" > #define THEAD_SYNC_S ".long 0x0190000b" > >