[PATCH 1/2] CHROMIUM: clk: rockchip: add clock IDs for the PVTM clocks

[PATCH 1/2] CHROMIUM: clk: rockchip: add clock IDs for the PVTM clocks

[Dmitry Torokhov]

From: Huang Lin <hl@rock-chips.com>

Process-Voltage-Temperature Monitor has two clocks, PVTM_CORE and
PVTM_GPU.

Signed-off-by: Huang Lin <hl@rock-chips.com>
Signed-off-by: Dmitry Torokhov <dtor@chromium.org>
---

Note that I left a hole at 122 for SCLK_USBPHY480M_SRC which is floating
around.

 include/dt-bindings/clock/rk3288-cru.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/include/dt-bindings/clock/rk3288-cru.h b/include/dt-bindings/clock/rk3288-cru.h
index f60ce72..ba4c194 100644
--- a/include/dt-bindings/clock/rk3288-cru.h
+++ b/include/dt-bindings/clock/rk3288-cru.h
@@ -81,6 +81,9 @@
 #define SCLK_SDIO1_SAMPLE	120
 #define SCLK_EMMC_SAMPLE	121
 
+#define SCLK_PVTM_CORE		123
+#define SCLK_PVTM_GPU		124
+
 #define DCLK_VOP0		190
 #define DCLK_VOP1		191
 
-- 
2.2.0.rc0.207.ga3a616c

[PATCH 2/2] CHROMIUM: clk: rockchip: add PVTM clocks on rk3288

[Dmitry Torokhov]

From: huang lin <hl@rock-chips.com>

Process-Voltage-Temperatiure Monitor block on RK3288 has two clocks:
PVTM_CORE and PVTM_GPU.

Signed-off-by: Huang Lin <hl@rock-chips.com>
Signed-off-by: Dmitry Torokhov <dtor@chromium.org>
---
 drivers/clk/rockchip/clk-rk3288.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
index ac6be7c..4632bb3 100644
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
@@ -704,8 +704,8 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
 
 	GATE(SCLK_LCDC_PWM0, "sclk_lcdc_pwm0", "xin24m", 0, RK3288_CLKGATE_CON(13), 10, GFLAGS),
 	GATE(SCLK_LCDC_PWM1, "sclk_lcdc_pwm1", "xin24m", 0, RK3288_CLKGATE_CON(13), 11, GFLAGS),
-	GATE(0, "sclk_pvtm_core", "xin24m", 0, RK3288_CLKGATE_CON(5), 9, GFLAGS),
-	GATE(0, "sclk_pvtm_gpu", "xin24m", 0, RK3288_CLKGATE_CON(5), 10, GFLAGS),
+	GATE(SCLK_PVTM_CORE, "sclk_pvtm_core", "xin24m", 0, RK3288_CLKGATE_CON(5), 9, GFLAGS),
+	GATE(SCLK_PVTM_GPU, "sclk_pvtm_gpu", "xin24m", 0, RK3288_CLKGATE_CON(5), 10, GFLAGS),
 	GATE(0, "sclk_mipidsi_24m", "xin24m", 0, RK3288_CLKGATE_CON(5), 15, GFLAGS),
 
 	/* sclk_gpu gates */
-- 
2.2.0.rc0.207.ga3a616c

Re: [PATCH 2/2] CHROMIUM: clk: rockchip: add PVTM clocks on rk3288

[Doug Anderson]

Dmitry,

On Thu, Dec 18, 2014 at 4:13 PM, Dmitry Torokhov <dtor@chromium.org> wrote:
> From: huang lin <hl@rock-chips.com>
>
> Process-Voltage-Temperatiure Monitor block on RK3288 has two clocks:
> PVTM_CORE and PVTM_GPU.
>
> Signed-off-by: Huang Lin <hl@rock-chips.com>
> Signed-off-by: Dmitry Torokhov <dtor@chromium.org>
> ---
>  drivers/clk/rockchip/clk-rk3288.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)

Thanks for sending!

Reviewed-by: Doug Anderson <dianders@chromium.org>

Re: [PATCH 1/2] CHROMIUM: clk: rockchip: add clock IDs for the PVTM clocks

[Doug Anderson]

Dmitry,

On Thu, Dec 18, 2014 at 4:13 PM, Dmitry Torokhov <dtor@chromium.org> wrote:
> From: Huang Lin <hl@rock-chips.com>
>
> Process-Voltage-Temperature Monitor has two clocks, PVTM_CORE and
> PVTM_GPU.
>
> Signed-off-by: Huang Lin <hl@rock-chips.com>
> Signed-off-by: Dmitry Torokhov <dtor@chromium.org>
> ---
>
> Note that I left a hole at 122 for SCLK_USBPHY480M_SRC which is floating
> around.

I'm sure Heiko can adjust when he lands.


>  include/dt-bindings/clock/rk3288-cru.h | 3 +++
>  1 file changed, 3 insertions(+)

Thanks for sending!

Reviewed-by: Doug Anderson <dianders@chromium.org>

Re: [PATCH 1/2] CHROMIUM: clk: rockchip: add clock IDs for the PVTM clocks

[Heiko Stübner]

Hi Dmitry,

This looks ok and also like it's meant to go upstream, because it still has 
the CHROMIUM-prefix?

No need to resend, I remove them myself, just want to make sure here :-)


Heiko

Am Donnerstag, 18. Dezember 2014, 16:13:45 schrieb Dmitry Torokhov:
> From: Huang Lin <hl@rock-chips.com>
> 
> Process-Voltage-Temperature Monitor has two clocks, PVTM_CORE and
> PVTM_GPU.
> 
> Signed-off-by: Huang Lin <hl@rock-chips.com>
> Signed-off-by: Dmitry Torokhov <dtor@chromium.org>
> ---
> 
> Note that I left a hole at 122 for SCLK_USBPHY480M_SRC which is floating
> around.
> 
>  include/dt-bindings/clock/rk3288-cru.h | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/include/dt-bindings/clock/rk3288-cru.h
> b/include/dt-bindings/clock/rk3288-cru.h index f60ce72..ba4c194 100644
> --- a/include/dt-bindings/clock/rk3288-cru.h
> +++ b/include/dt-bindings/clock/rk3288-cru.h
> @@ -81,6 +81,9 @@
>  #define SCLK_SDIO1_SAMPLE	120
>  #define SCLK_EMMC_SAMPLE	121
> 
> +#define SCLK_PVTM_CORE		123
> +#define SCLK_PVTM_GPU		124
> +
>  #define DCLK_VOP0		190
>  #define DCLK_VOP1		191

Re: [PATCH 1/2] CHROMIUM: clk: rockchip: add clock IDs for the PVTM clocks

[Dmitry Torokhov]

Hi Heiko,

On Sun, Dec 21, 2014 at 03:14:53PM +0100, Heiko Stübner wrote:
> Hi Dmitry,
> 
> This looks ok and also like it's meant to go upstream, because it still has 
> the CHROMIUM-prefix?
> 
> No need to resend, I remove them myself, just want to make sure here :-)

Yes, my bad, I failed to sanitize the commit messages properly. Both of
these are meant for upstream.

Thanks!

-- 
Dmitry

Re: [PATCH 1/2] CHROMIUM: clk: rockchip: add clock IDs for the PVTM clocks

[Heiko Stübner]

Am Donnerstag, 18. Dezember 2014, 16:13:45 schrieb Dmitry Torokhov:
> From: Huang Lin <hl@rock-chips.com>
> 
> Process-Voltage-Temperature Monitor has two clocks, PVTM_CORE and
> PVTM_GPU.
> 
> Signed-off-by: Huang Lin <hl@rock-chips.com>
> Signed-off-by: Dmitry Torokhov <dtor@chromium.org>

applied both patches to my tree

The clock-id addition is living in a separate branch, so if you have dts 
updates using this I can share the clock-id branch easily.


Heiko