From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757270AbcHCHzO (ORCPT ); Wed, 3 Aug 2016 03:55:14 -0400 Received: from mout.kundenserver.de ([212.227.17.24]:56567 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757137AbcHCHyi (ORCPT ); Wed, 3 Aug 2016 03:54:38 -0400 From: Arnd Bergmann To: linux-arm-kernel@lists.infradead.org Cc: Kishon Vijay Abraham I , "bhelgaas@google.com" , "linux-pci@vger.kernel.org" , Jingoo Han , Pratyush Anand , Gabriele Paoloni , David Daney , Thierry Reding , Tanmay Inamdar , Joao Pinto , Murali Karicheri , Jason Cooper , Simon Horman , Mingkai Hu , "linux-omap@vger.kernel.org" , Thomas Petazzoni , Richard Zhu , "linux-kernel@vger.kernel.org" , Stanimir Varbanov , Minghuan Lian , Zhou Wang , Ley Foon Tan , Roy Zang , Lucas Stach , Jon Mason Subject: Re: Support for configurable PCIe endpoint Date: Wed, 03 Aug 2016 09:42:39 +0200 Message-ID: <2795776.a946dnWVV6@wuerfel> User-Agent: KMail/5.1.3 (Linux/4.4.0-31-generic; KDE/5.18.0; x86_64; ; ) In-Reply-To: <57A18927.9070003@ti.com> References: <57A18927.9070003@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Provags-ID: V03:K0:aGAN3LFbLqM8bH/Jt/uqkCOTdRzDJ8l+zVCHCbTkIyLOWgRbv7k 8w0a4+lrPGFF8uagUlM4v+eqdgYGXwebY4lbh4jnbIjwkrN5B7kAodwvKtJiikyrT29QBkQ 6NbhQ+xR+3+jH0nj3BeXNlJyWztLqUo+Y0XmhMNEG2b9V42bSvRa/Skgep1+pUIHmnHJTQB KR94c96OHd00V7cJHo1vQ== X-UI-Out-Filterresults: notjunk:1;V01:K0:izJwzrVZPBA=:fb6LSFR37bKcKe+VfPTPcm aNeTWlkvtX85x46ty7BMfIS2OLgUA3gM2y48KG8PI4DTcYYtyJZsSBjxB5R93kk9Ev1u3YR3P I6/nwv1zUCefeZB7lzO+EwlIsbIwHKeLvvEwzjDgNgsv51rtEFaR8vFlcJ60aa6pJOCT/WZPQ mr8fnB4D1yioyPDcUwR7SS013hQBV2qoXBrOCefidwOx9kRhDafUy3lp0Iu9aOhZ6EWdBtbGY ZRgUHU/tRQNf7VlkTO/eTWJeeEMSYk/oauQydGxSaAtF+Xz7XzUFWAFgGqIdGWEkxlj9HaL5r Z5a4yDD8HT1l2mttKPyeAG6VCbXkEFQnjpWeV9+tJpGzAgZY+J4tHHNV3LhELBvlA81ownQGf vfIWmbsBD4oqC5u/2UxDd48sDFDfNzsD06IV1CYmjFVO1KJMlRxueStfKCLNj98Nsi2quaKtX xT6wrT8MlSNFYKZt6K+TBAcLfB5bekVrEMUma1zvO4sNSD/VcdldEgIQoYVW2gHnDFDQ87xV2 MloxNwAELbscEx+3bg0y9tTQZ9GpHVFeHQYmbyeb0dw4ZX83CjMA7VvfxP3/uioFGfjIypHvh q77j+omTsXbsDtYz2zF5hG3soODx9bvDYW6HXG9WBfmVQFOHBnUOnMvQM80NGGG+k1awWZVDC LxQjAXSibLZN4jm9rHr2MchqwnEgLp8G+Ku/EzYLvBqFj/m+v2Q1+8hCnqLq3afAFwlE306sB TCm6cMAHvT+El8Oe Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wednesday, August 3, 2016 11:33:19 AM CEST Kishon Vijay Abraham I wrote: > Hi, > > The PCIe controller present in TI's DRA7 SoC is capable of operating either in > Root Complex mode or Endpoint mode. (It uses Synopsys Designware Core).I'd > assume most of the PCIe controllers on other platforms that use Designware core > should also be capable to operate in endpoint mode. But linux kernel right now > supports only RC mode. > > PCIe endpoint support discussion came up briefly before [1] but it was felt the > practical use case will find firmware more suitable and endpoint support in > kernel can be used only for validation or demo. > > Validation or demo is itself a valid use case in my opinion (consider something > similar to gadget zero for USB). There can be other use cases as well. The RC > can use the SoC with EP mode support as an accelerator to accomplish specific > task. Here RC gives data to the EP. The EP processes the data. The processing > can be done either in ARM itself or it can use other hardware accelerators > (like DSP, IVA-HD etc..) present in the EP system. If HW accelerator is used, > the linux kernel running in ARM can be used to accomplish other tasks. Once EP > mode support is added, I think more use cases will be added. > > From the high level this should look _similar_ to the gadget framework of USB. > One difference from USB would be this should allow HW components (like DSP, PRU > etc.. and maybe even some peripheral) in the EP system to be used by RC system. (Adding Jon Mason) We have the drivers/ntb framework, which in theory should be able to handle this, but in practice is only used for a very small number of bridge implementations, and is also limited in the way it can be configured (compared to USB gadget) > So these are the high-level steps that I thought would be needed to add EP > support in linux. > *) move pcie-designware.c out of drivers/pci/host (maybe create a > drivers/pci/designware/ folder?). All users of pcie-designware.c should be > moved here. > This is in preparation for adding EP mode support to designware. A lot of the other drivers in drivers/pci/host support endpoint mode too, I don't think moving them all elsewhere is helpful or necessary here. > *) Add library functions in pcie-designware.c specific to EP mode like > initializing general ecam registers, BAR registers etc.. These functions should > be invoked from a *function* driver (function driver should determine the use > of a particular EP). > > *) Add a sample *function* driver that can be used just for validation. This > function driver will invoke the previously added functions in PCIe controller > to initialize ecam, BAR etc.. This will invoke the PCIe controller functions > through *ep-core* layer. That way the same function driver can be made to work > with different PCIe controllers. (A PCIe driver corresponding to this function > driver should also be implemented in RC side) > > *) Add *ep-core* layer to bind the function driver to the controller driver and > using which the function driver will invoke controller driver callbacks (to > initialize ecam, BAR registers etc..) I think we should first have a rough idea what the framework should look like, and how it handles having multiple hardware implementation and multiple protocol implementations, before we modify a particular driver. So this step here should come a bit earlier than the others. > *) Modify platform driver to support EP mode (in my case pci-dra7xx.c). > > *) dt binding specific to EP mode should be created. Right. Arnd