From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753823AbbLEKNG (ORCPT ); Sat, 5 Dec 2015 05:13:06 -0500 Received: from gloria.sntech.de ([95.129.55.99]:37844 "EHLO gloria.sntech.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753394AbbLEKNE (ORCPT ); Sat, 5 Dec 2015 05:13:04 -0500 From: Heiko =?ISO-8859-1?Q?St=FCbner?= To: Michael Turquette , kishon@ti.com Cc: sboyd@codeaurora.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, dianders@chromium.org, romain.perier@gmail.com, arnd@arndb.de Subject: Re: [PATCH 5/8] clk: rockchip: fix usbphy-related clocks Date: Sat, 05 Dec 2015 11:12:55 +0100 Message-ID: <2813307.eVUP6EkfG2@diego> User-Agent: KMail/4.14.10 (Linux/4.2.0-1-amd64; KDE/4.14.13; x86_64; ; ) In-Reply-To: <56622abb9f53f_650d3fc0582a72d85a@quark.notmuch> References: <1446673454-9529-1-git-send-email-heiko@sntech.de> <1446673454-9529-6-git-send-email-heiko@sntech.de> <56622abb9f53f_650d3fc0582a72d85a@quark.notmuch> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Mike Am Freitag, 4. Dezember 2015, 16:07:23 schrieb Michael Turquette: > Heiko Stuebner wrote: > > The otgphy clocks really only drive the phy blocks. These in turn > > contain plls that then generate the 480m clocks the clock controller > > uses to supply some other clocks like uart0, gpu or the video-codec. > > > > So fix this structure to actually respect that hirarchy and removed > > that usb480m fixed-rate clock working as a placeholder till now, as > > this wouldn't even work if the supplying phy gets turned off while > > its pll-output gets used elsewhere. > > > > Signed-off-by: Heiko Stuebner > > Acked-by: Michael Turquette Thanks for Ack + Review, but it seems you found a slightly old version in your inbox :-) So right new we have, - [PATCH 5/8] clk: rockchip: fix usbphy-related clocks Acked-by: Michael Turquette - [PATCH 6/8] ARM: dts: rockchip: add clock-cells for usb phy nodes Reviewed-by: Michael Turquette which should translate nicely to the two equivalent patches in v3: [PATCH v3 6/8] ARM: dts: rockchip: add clock-cells for usb phy nodes [PATCH v3 7/8] clk: rockchip: fix usbphy-related clocks but I guess Kishon, was also looking for an Ack on the usbphy-code actually exposing these clocks in [PATCH v3 5/8] phy: rockchip-usb: expose the phy-internal PLLs If you could also take a look at that patch, I would be glad :-) Thanks Heiko