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[213.161.3.76]) by smtp.gmail.com with ESMTPSA id bv15-20020a170906b1cf00b006f4c4330c49sm846072ejb.57.2022.06.01.08.24.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Jun 2022 08:24:20 -0700 (PDT) From: Jernej =?utf-8?B?xaBrcmFiZWM=?= To: Linus Walleij , Chen-Yu Tsai , Samuel Holland Cc: Andre Przywara , Maxime Ripard , Krzysztof Kozlowski , Philipp Zabel , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev Subject: Re: Re: [PATCH 0/3] pinctrl: sunxi: Remove non-existent reset line references Date: Wed, 01 Jun 2022 17:24:08 +0200 Message-ID: <2828716.e9J7NaK4W3@kista> In-Reply-To: <48570ec3-8159-11ae-8069-7f001081fd56@sholland.org> References: <20220531053623.43851-1-samuel@sholland.org> <4400164.LvFx2qVVIh@kista> <48570ec3-8159-11ae-8069-7f001081fd56@sholland.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Dne sreda, 01. junij 2022 ob 06:42:34 CEST je Samuel Holland napisal(a): > Hi Jernej, >=20 > On 5/31/22 10:22 AM, Jernej =C5=A0krabec wrote: > > Dne torek, 31. maj 2022 ob 07:36:20 CEST je Samuel Holland napisal(a): > >> I assume these properties came from a lack of documentation, and the > >> very reasonable assumption that where there's a clock gate bit in the > >> CCU, there's a reset bit. But the pin controllers are special and don't > >> have a module reset line. The only way to reset the pin controller is = to > >> reset the whole VDD_SYS power domain. > >> > >> This series is preparation for converting the PRCM MFD and legacy clock > >> drivers to a CCU clock/reset driver like all of the other Allwinner > >> SoCs. I don't plan to add reset lines that don't actually exist to the > >> new CCU driver. So we might as well get rid of the references now. > >> Technically this breaks devicetree compatibility, since the old drivers > >> expect the reset. But the CCU conversion will be a compatibility break > >> anyway, so it's a bit of a moot point. > >=20 > > If I understand correclty, this would cause only DT forward compatibili= ty=20 > > issue, which happens now and then anyway. Kernel would still be compati= ble=20 > > with older DTs, it would just ignore that reset, right? >=20 > Right, this only prevents older kernels from working with newer devicetre= es.=20 I > brought it up because I'm generally trying to minimize how much we do tha= t. All good then, this series is: Reviewed-by: Jernej Skrabec Best regards, Jernej