From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1030431AbcIXVBp (ORCPT ); Sat, 24 Sep 2016 17:01:45 -0400 Received: from mout.kundenserver.de ([217.72.192.73]:57575 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932768AbcIXVBn (ORCPT ); Sat, 24 Sep 2016 17:01:43 -0400 From: Arnd Bergmann To: linux-arm-kernel@lists.infradead.org Cc: zhichang , Gabriele Paoloni , "devicetree@vger.kernel.org" , "lorenzo.pieralisi@arm.com" , "benh@kernel.crashing.org" , "minyard@acm.org" , "gregkh@linuxfoundation.org" , John Garry , "will.deacon@arm.com" , "linux-kernel@vger.kernel.org" , Yuanzhichang , Linuxarm , "xuwei (O)" , "linux-serial@vger.kernel.org" , "linux-pci@vger.kernel.org" , "zourongrong@gmail.com" , "liviu.dudau@arm.com" , "kantyzc@163.com" Subject: Re: [PATCH V3 2/4] ARM64 LPC: LPC driver implementation on Hip06 Date: Sat, 24 Sep 2016 23:00:40 +0200 Message-ID: <2866656.cISrGNv8pP@wuerfel> User-Agent: KMail/5.1.3 (Linux/4.4.0-34-generic; KDE/5.18.0; x86_64; ; ) In-Reply-To: <05a573de-e963-6590-6ed3-55af97067d7a@gmail.com> References: <1473855354-150093-1-git-send-email-yuanzhichang@hisilicon.com> <1849232.KJrfRPHGN6@wuerfel> <05a573de-e963-6590-6ed3-55af97067d7a@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Provags-ID: V03:K0:7Ds6oPcwEtBrlMrtMBAtLxY8g2tBY1q85C/a9O3uE6B/1hKgGCf FmkK3oYfNWlF2u4u1dIKkQ4DZceLsk6g4FPJHuwR8BS6uHXEuvjBPa6TazH7svd90MLsVyk hpQxYUSjhIakr+2tk/9+QKi+/LszhbqJ+fav1pPB+YXuGcLQMFxY6w33ggR0744hyIHN4kI LlOn3V1MgHEJO43tRoZyg== X-UI-Out-Filterresults: notjunk:1;V01:K0:kHmZTMqcTsk=:ssCQ9kTHvT7mzKLB1Dugo6 RHgTNkgWm2aY16edFZuu1Tc+bnnZP1vi8UeQ4BLb/2mUxSZGzZorZ7KuWN2WWUzl0ddJLYzn2 2GXHnZoaSn2tnN3AuJDt5hIdWLavDuHvKjGy/RBeBXumeytRkoFGWOkSNZJEe5w8u9TYwYmFq QgaW+AMV2+JbrTsBHEELcjLAd1wC3+9+VRl0xp7p2wbv1tA2+mqvWSoTHxZSRuTRsYuAOH5eP 8559iZ5k3Y2+m2Wgok38p7Ng5p4JMZ2vkGy0dW5TpThqzDm/rlh79DjY74zoN4v/Qhf+5tUST adtCvh0J/x0Q5vcDwk9qXdv4W5953AYA7kune0f45L9yZYeEZpzKdfcT1819OdvsbMZPCo/Rp LV01Dpxk/b5YQrNMsImMBNdfrmKnbbLFHa+cxFVwYX/tFNYEXCRSfM89GdyXMS00vVUnp1ubi t0V54W34IFDkQDrIpbWvPT3rXSF4NYryP/0vrMtAFnfoSZDhh34llrGXc6ldSiewZbl5NLkxO NxTsBh1KBpM7y4bWq0pU6aiinNzmZfuhT4Ucm8XNnqqts0dBxFGdwXxbjzPD0jlEQfZ8cJbVN Nwh+DsY49xtyHltVA6esR2fqBWVOAz7XhP81Zys4Qv9zn9RNpvhdJRMicKQ8q4nxBQS1U0yl6 67yBQCWUsXstlZXiKuIPMdUHAL4CS+yNdy6aYGbsbJqkNHfumzS7NtAdqUveB9zl7P381kwr5 GPSYOSjaPKrWWz8k Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Saturday, September 24, 2016 4:14:15 PM CEST zhichang wrote: > > In V3, the outb is : > > void outb(u8 value, unsigned long addr) > { > if (!arm64_extio_ops || arm64_extio_ops->start > addr || > arm64_extio_ops->end < addr) > writeb(value, PCI_IOBASE + addr); > else > if (arm64_extio_ops->pfout) > arm64_extio_ops->pfout(arm64_extio_ops->devpara, > addr + arm64_extio_ops->ptoffset, &value, > sizeof(u8), 1); > } > > here, arm64_extio_ops->ptoffset is the offset between the real legacy IO address > and the logical IO address, similar to the offset of primary address and > secondary address in PCI bridge. Ok, though we can probably simplify this by making the assumption that 'ptoffset' is the negative of 'start', as the bus we register should always start at port zero. > But in V3, LPC driver call pci_address_to_pio to request the logical IO as PCI > host bridge during its probing. Right, so this still needs to be fixed. Arnd