Re: [PATCH V3] PCI/ASPM: Save/restore L1SS Capability for suspend/resume

[Abhishek Sahu <abhsahu@nvidia.com>]

On 8/26/2022 6:25 PM, Vidya Sagar wrote:
> Previously ASPM L1 Substates control registers (CTL1 and CTL2) weren't
> saved and restored during suspend/resume leading to L1 Substates
> configuration being lost post-resume.
> 
> Save the L1 Substates control registers so that the configuration is
> retained post-resume.
> 

 Tested-by: Abhishek Sahu <abhsahu@nvidia.com>

> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
> ---
> V3:
> * Disabled L1.2 enable fields while restoring Control-1 register
> 

 Thanks Vidya.

 I have applied your v3 patch in 6.0-rc3 kernel and tested again.
 I did 100 cycles of suspend/resume in a Alder lake based notebook
 which has NVIDIA discrete GPU and it is working fine.

 # lspci -d "0x10de:" -vvv|grep "L1SubCtl" -A 2

 After Boot:

   L1SubCtl1: PCI-PM_L1.2+ PCI-PM_L1.1+ ASPM_L1.2+ ASPM_L1.1+
               T_CommonMode=0us LTR1.2_Threshold=753664ns
   L1SubCtl2: T_PwrOn=500us

 After Suspend/resume without this patch:

   L1SubCtl1: PCI-PM_L1.2- PCI-PM_L1.1- ASPM_L1.2- ASPM_L1.1-
              T_CommonMode=0us LTR1.2_Threshold=0ns
   L1SubCtl2: T_PwrOn=10us

 After Suspend/resume with this patch:

   L1SubCtl1: PCI-PM_L1.2+ PCI-PM_L1.1+ ASPM_L1.2+ ASPM_L1.1+
              T_CommonMode=0us LTR1.2_Threshold=753664ns
   L1SubCtl2: T_PwrOn=500us

 So with this patch, the L1SubCtl1 and L1SubCtl2 settings are being
 restored back correctly.
 
 Regards,
 Abhishek