From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id EAF6F2E2665; Thu, 29 Jan 2026 11:38:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769686726; cv=none; b=TaZ64ZZk5j6tSMISpLJpbg4BMDhiFjXSDm+L4D87lQXJeWz3w29fIR211I08wPkHMy05Eauc9sqyrIkm9+wRCC087UQJBPWWLQUnf16zog6SLU5GVrA6sVZ2jMUxZEVhIuyyoqE6RPy8maZvsW3ru6SwrTSdXEIpe6DRv7JzKOU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769686726; c=relaxed/simple; bh=gn1GTeanFS2tyXtDUWwyjgOPS2OlfxQ6NFktIwKSUEU=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=h0f8B//N2ojtRY+SyBTub7CViu9BRht9n/IMzF3cb4Zb1PEExJyRwgbgDhJCfAnrUltwgDQ2dR0AmksnMR3m0OuW4j2YU8unw82OLYrPU6Cj0i8MCFbc062zgWrUbs/xvKawe4o3qyOjNwzNsks3w4vew9TsxBIwfr0S5bNvnjU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 849AC1516; Thu, 29 Jan 2026 03:38:36 -0800 (PST) Received: from [10.57.17.98] (unknown [10.57.17.98]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 046403F73F; Thu, 29 Jan 2026 03:38:39 -0800 (PST) Message-ID: <2ca3a260-d05f-4f2d-bf3f-08b4a3908792@arm.com> Date: Thu, 29 Jan 2026 11:38:41 +0000 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] arm64: dts: qcom: sm8550: Update EAS properties To: Konrad Dybcio , Viresh Kumar Cc: webgeek1234@gmail.com, Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Viresh Kumar , "Rafael J. Wysocki" , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Xilin Wu References: <20260128-sm8550-eas-v1-1-fb80615bed5c@gmail.com> <76c24508-bb75-475a-b973-d7ad18c302ce@oss.qualcomm.com> Content-Language: en-US From: Lukasz Luba In-Reply-To: <76c24508-bb75-475a-b973-d7ad18c302ce@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 1/29/26 11:23, Konrad Dybcio wrote: > On 1/29/26 12:05 PM, Viresh Kumar wrote: >> On 29-01-26, 12:00, Konrad Dybcio wrote: >>> On 1/28/26 8:11 PM, Aaron Kling via B4 Relay wrote: >>>> It should be noted that the A715 cores seem less efficient than the >>>> A710 cores. Therefore, an average value has been assigned to them, >>>> considering that the A715 and A710 cores share a single cpufreq >>>> domain. >>> >>> Regarding the CPUFreq domain shared across cores with different power >>> characteristics, I think we shouldn't be lying to the OS, rather Linux >>> should be able to deal with it, somehow. >> >> cpufreq-domain == cpufreq-policy here I guess. All CPUs that change >> their DVFS state together should be part of one policy. Not sure if >> there is something else you were pointing at. > > Yes, they change their state together. > > The question is whether it's okay for these CPUs to have different > dynamic-power-coefficient values, and whether the EM code won't be > thrown off by that. The Energy Model won't support that, since it's a single instance per-cpufreq-policy and we have to pick 'some' values (in this case). > > Again, they differ because within that shared policy, there's 2 > separate kinds of cores (2x Cortex-A715 + 2x Cortex-A710). > For this SoC I assume the physical HW (power rail and frequency domain) is linked to those 4 CPUs. That's quite novel configuration... Maybe I could give you some hint at least for the EAS part (the EM for EAS), because for something in other areas (e.g. thermal) might be really tough. What are the other CPUs in that SoC and their DVFS configs? Regards, Lukasz