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Tue, 04 Nov 2025 08:38:44 -0800 (PST) X-Google-Smtp-Source: AGHT+IGz6uJF0hcsIaWD0Bqp9R29GTarddruadQBQ56H22/WdcYPRdszrtsBx7nayDpricbv68SMYA== X-Received: by 2002:a17:903:46c6:b0:295:39d9:8971 with SMTP id d9443c01a7336-2962ad0c936mr3416255ad.1.1762274324314; Tue, 04 Nov 2025 08:38:44 -0800 (PST) Received: from [192.168.29.63] ([49.43.227.162]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-29601972a9fsm31883835ad.20.2025.11.04.08.38.38 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 04 Nov 2025 08:38:44 -0800 (PST) Message-ID: <2d4a192f-45b2-4aee-bcc9-dbe0dce0aa93@oss.qualcomm.com> Date: Tue, 4 Nov 2025 22:08:35 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] PCI: qcom: Program correct T_POWER_ON value for L1.2 exit timing To: Konrad Dybcio , Manivannan Sadhasivam , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, mayank.rana@oss.qualcomm.com, quic_vbadigan@quicinc.com References: <20251104-t_power_on_fux-v1-1-eb5916e47fd7@oss.qualcomm.com> <29b32098-39ca-440d-9b51-915157b752b5@oss.qualcomm.com> Content-Language: en-US From: Krishna Chaitanya Chundru In-Reply-To: <29b32098-39ca-440d-9b51-915157b752b5@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTA0MDEzOSBTYWx0ZWRfX1Nv+TMNWqwDn +JuPnvdAkjVZlqAlKzBrNzVSTEyRwX2SwyFTl1+KjkLTb6xh3tNo97+UOPDnxPDbDOobJ2+Ni4c c2KvlV033DNJS8wmt7BhOpEyuzd9JOyQAHBzEtOOHvSla7Bu1am3gZWp/VrGA8LAV4QjUPCmitt SZKBJ2xSYCEJYSX2sWnRS10kSNUtMddJvEp+WcGv1Ti2yoIrsl4ZF2i828obHrHU4B5RCyONejQ AQKWXpnGgicevFUZ5lOKiLkwKWgw9RrNlPbSDm6d/uJAQtXYIzyhw3q+fhgrgKi3zOvMSEYD0YP xk6a1SpGTbrTBGM770PY/dOSr29lKjCGc+Up1XcgpI379YUQ1hWQBbJMPyWqB866goxYZ0LVhHs Exqtp7Pf5tCuFZTHGqM+LQHbBZWBbg== X-Proofpoint-GUID: bkbJwm8rTY8zqjJ_tX5yxYBcxncULgam X-Proofpoint-ORIG-GUID: bkbJwm8rTY8zqjJ_tX5yxYBcxncULgam X-Authority-Analysis: v=2.4 cv=Y4L1cxeN c=1 sm=1 tr=0 ts=690a2c15 cx=c_pps a=cmESyDAEBpBGqyK7t0alAg==:117 a=ISmZZG41GQzdpg15mxjwIw==:17 a=IkcTkHD0fZMA:10 a=6UeiqGixMTsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=WGPAbWhItJlpQzQmOdIA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=1OuFwYUASf3TG4hYMiVC:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-04_02,2025-11-03_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 priorityscore=1501 suspectscore=0 phishscore=0 bulkscore=0 impostorscore=0 spamscore=0 adultscore=0 malwarescore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2511040139 On 11/4/2025 5:59 PM, Konrad Dybcio wrote: > On 11/4/25 1:12 PM, Krishna Chaitanya Chundru wrote: >> The T_POWER_ON indicates the time (in μs) that a Port requires the port >> on the opposite side of Link to wait in L1.2.Exit after sampling CLKREQ# >> asserted before actively driving the interface. This value is used by >> the ASPM driver to compute the LTR_L1.2_THRESHOLD. >> >> Currently, the root port exposes a T_POWER_ON value of zero in the L1SS >> capability registers, leading to incorrect LTR_L1.2_THRESHOLD calculations. >> This can result in improper L1.2 exit behavior and can trigger AER's. >> >> To address this, program the T_POWER_ON value to 80us (scale = 1, >> value = 8) in the PCI_L1SS_CAP register during host initialization. This >> ensures that ASPM can take the root port's T_POWER_ON value into account >> while calculating the LTR_L1.2_THRESHOLD value. > Is 80us a meaningful value, or "just happens to work"? This value is given by hardware team. - Krishna Chaitanya. > > Konrad >