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X-CSE-ConnectionGUID: yetsdBeAQqKxrTbY54EXIQ== X-CSE-MsgGUID: tR7NtcMpTUWfLwiAKa7c4A== X-IronPort-AV: E=McAfee;i="6800,10657,11662"; a="79321889" X-IronPort-AV: E=Sophos;i="6.21,204,1763452800"; d="scan'208";a="79321889" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Jan 2026 13:00:06 -0800 X-CSE-ConnectionGUID: ets8Jf6JTOqSDkzcEpWb1Q== X-CSE-MsgGUID: pA4sYZEAQS+wnfjWtHiJIg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,204,1763452800"; d="scan'208";a="206954536" Received: from vverma7-desk1.amr.corp.intel.com (HELO [10.125.109.45]) ([10.125.109.45]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Jan 2026 13:00:03 -0800 Message-ID: <2fb3f73d-a808-4a6a-a90e-b83a32a4da57@intel.com> Date: Mon, 5 Jan 2026 14:00:02 -0700 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 1/2] Documentation/driver-api/cxl: BIOS/EFI expectation update To: Gregory Price , linux-cxl@vger.kernel.org Cc: linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, kernel-team@meta.com, dave@stgolabs.net, jonathan.cameron@huawei.com, alison.schofield@intel.com, vishal.l.verma@intel.com, ira.weiny@intel.com, dan.j.williams@intel.com, corbet@lwn.net, rakuram.e96@gmail.com, alucerop@amd.com References: <20251219170538.1675743-1-gourry@gourry.net> <20251219170538.1675743-2-gourry@gourry.net> Content-Language: en-US From: Dave Jiang In-Reply-To: <20251219170538.1675743-2-gourry@gourry.net> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 12/19/25 10:05 AM, Gregory Price wrote: > Add a snippet about what Linux expects BIOS/EFI to do (and not > to do) to the BIOS/EFI section. > > Suggested-by: Alejandro Lucero Palau > Signed-off-by: Gregory Price Reviewed-by: Dave Jiang > --- > .../driver-api/cxl/platform/bios-and-efi.rst | 20 +++++++++++++++++++ > 1 file changed, 20 insertions(+) > > diff --git a/Documentation/driver-api/cxl/platform/bios-and-efi.rst b/Documentation/driver-api/cxl/platform/bios-and-efi.rst > index a9aa0ccd92af..9034c206cf8e 100644 > --- a/Documentation/driver-api/cxl/platform/bios-and-efi.rst > +++ b/Documentation/driver-api/cxl/platform/bios-and-efi.rst > @@ -29,6 +29,26 @@ at :doc:`ACPI Tables `. > on physical memory region size and alignment, memory holes, HDM interleave, > and what linux expects of HDM decoders trying to work with these features. > > + > +Linux Expectations of BIOS/EFI Software > +======================================= > +Linux expects BIOS/EFI software to construct sufficient ACPI tables (such as > +CEDT, SRAT, HMAT, etc) and platform-specific configurations (such as HPA spaces > +and host-bridge interleave configurations) to allow the Linux driver to > +subsequently configure the devices in the CXL fabric at runtime. > + > +Programming of HDM decoders and switch ports is not required, and may be > +deferred to the CXL driver based on admin policy (e.g. udev rules). > + > +Some platforms may require pre-programming HDM decoders and locking them > +due to quirks (see: Zen5 address translation), but this is not the normal, > +"expected" configuration path. This should be avoided if possible. > + > +Some platforms may wish to pre-configure these resources to bring memory > +up without requiring CXL driver support. These platform vendors should > +test their configurations with the existing CXL driver and provide driver > +support for their auto-configurations if features like RAS are required. > + > UEFI Settings > ============= > If your platform supports it, the :code:`uefisettings` command can be used to