From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from out-172.mta0.migadu.com (out-172.mta0.migadu.com [91.218.175.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C008A1D5141 for ; Sat, 7 Feb 2026 10:54:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770461646; cv=none; b=STTn8v97Di2oW5eP51/v3L+Py8INuaygsnWMKFH5l70JHiNLJGK8olYse+ZYXnOMeFqpt+km6+kXchS3UghvjAjTIV1X9PTRj+o34fGcNJ6G2w2/9lBdTNd6sVlQqG700nicsZqHGho577DPebtzj4wXWdF2+R2Xip0iZqA6Veg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1770461646; c=relaxed/simple; bh=Vv1Z+kBNua6kZdCRwxY739RJbTwDKmwcS/7jgSTque8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ZP9s8bJEXKDbnnWmQ0dDgonFtQHpGFuoU8qEtklCssoQ6vLfxgAjnhgd6i3AIkEGSAiIHlbBP8FeDQsyZapQHNfyeYSF+CFc1sfkhr5o8Mx8bsrjFM8Mp0dIkoq98sMdUXjnM+j3WVOildASrk1Xx33jg5va56CHdeItj6FlhCo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=bzUM415I; arc=none smtp.client-ip=91.218.175.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="bzUM415I" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1770461633; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=QZh0R8vWCBol722cPbD/0P1LqMJ0zb7aYvYr9xYxFi4=; b=bzUM415ICosLe1IDqKekKvGuBGnaE93Ls22T+cW13EdVzFOfz/SdTc8KnhnLARVUR1PmRn bk3OIUrVs0K20T4YUWHwF7nOVuAcVHmIStsoeZksoKIL61VDngtDsuQlXA5RChztsDWeFP JwpzHVJKArWlK7xAOKnGwcbgcQVe9i0= From: Menglong Dong To: Menglong Dong , Pu Lehui Cc: bjorn@kernel.org, ast@kernel.org, daniel@iogearbox.net, andrii@kernel.org, martin.lau@linux.dev, eddyz87@gmail.com, song@kernel.org, yonghong.song@linux.dev, john.fastabend@gmail.com, kpsingh@kernel.org, sdf@fomichev.me, haoluo@google.com, jolsa@kernel.org, puranjay@kernel.org, pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, bpf@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, jiang.biao@linux.dev Subject: Re: [PATCH bpf-next v3 1/3] bpf, riscv: introduce emit_store_stack_imm64() for trampoline Date: Sat, 07 Feb 2026 18:53:17 +0800 Message-ID: <3042323.e9J7NaK4W3@7950hx> In-Reply-To: References: <20260206122002.1494125-1-dongml2@chinatelecom.cn> <20260206122002.1494125-2-dongml2@chinatelecom.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" X-Migadu-Flow: FLOW_OUT On 2026/2/7 09:13, Pu Lehui wrote: >=20 > On 2026/2/6 20:20, Menglong Dong wrote: > > Introduce a helper to store 64-bit immediate on the trampoline stack wi= th > > a help of a register. > >=20 > > Signed-off-by: Menglong Dong > > Tested-by: Bj=C3=B6rn T=C3=B6pel > > Acked-by: Bj=C3=B6rn T=C3=B6pel > > --- > > arch/riscv/net/bpf_jit_comp64.c | 25 ++++++++++++++----------- > > 1 file changed, 14 insertions(+), 11 deletions(-) > >=20 > > diff --git a/arch/riscv/net/bpf_jit_comp64.c b/arch/riscv/net/bpf_jit_c= omp64.c > > index 37888abee70c..e4f45e2e7e2f 100644 > > --- a/arch/riscv/net/bpf_jit_comp64.c > > +++ b/arch/riscv/net/bpf_jit_comp64.c > > @@ -926,6 +926,14 @@ static void restore_stack_args(int nr_stack_args, = int args_off, int stk_arg_off, > > } > > } > > =20 > > +static void emit_store_stack_imm64(u8 reg, int stack_off, u64 imm64, > > + struct rv_jit_context *ctx) >=20 > Some nit. The first parameter can be removed by using a fixed RV_REG_T1.= =20 > Also, placing imm64 before stack_off might looks better. Hi, Lehui. When I implement the emit_store_stack_imm64() in x86, Andrii suggested that we'd better use the register explicitly to indicate the register is used. So maybe it's better to keep this part still? I can place the imm64 before stack_off. Thanks! Menglong Dong >=20 > > +{ > > + /* Load imm64 into reg and store it at [FP + stack_off]. */ > > + emit_imm(reg, (s64)imm64, ctx); > > + emit_sd(RV_REG_FP, stack_off, reg, ctx); > > +} > > + > > static int invoke_bpf_prog(struct bpf_tramp_link *l, int args_off, in= t retval_off, > > int run_ctx_off, bool save_ret, struct rv_jit_context *ctx) > > { > > @@ -933,12 +941,10 @@ static int invoke_bpf_prog(struct bpf_tramp_link = *l, int args_off, int retval_of > > struct bpf_prog *p =3D l->link.prog; > > int cookie_off =3D offsetof(struct bpf_tramp_run_ctx, bpf_cookie); > > =20 > > - if (l->cookie) { > > - emit_imm(RV_REG_T1, l->cookie, ctx); > > - emit_sd(RV_REG_FP, -run_ctx_off + cookie_off, RV_REG_T1, ctx); > > - } else { > > + if (l->cookie) > > + emit_store_stack_imm64(RV_REG_T1, -run_ctx_off + cookie_off, l->cook= ie, ctx); > > + else > > emit_sd(RV_REG_FP, -run_ctx_off + cookie_off, RV_REG_ZERO, ctx); > > - } > > =20 > > /* arg1: prog */ > > emit_imm(RV_REG_A0, (const s64)p, ctx); > > @@ -1123,13 +1129,10 @@ static int __arch_prepare_bpf_trampoline(struct= bpf_tramp_image *im, > > emit_sd(RV_REG_FP, -sreg_off, RV_REG_S1, ctx); > > =20 > > /* store ip address of the traced function */ > > - if (flags & BPF_TRAMP_F_IP_ARG) { > > - emit_imm(RV_REG_T1, (const s64)func_addr, ctx); > > - emit_sd(RV_REG_FP, -ip_off, RV_REG_T1, ctx); > > - } > > + if (flags & BPF_TRAMP_F_IP_ARG) > > + emit_store_stack_imm64(RV_REG_T1, -ip_off, (u64)func_addr, ctx); > > > - emit_li(RV_REG_T1, nr_arg_slots, ctx); > > - emit_sd(RV_REG_FP, -nregs_off, RV_REG_T1, ctx); > > + emit_store_stack_imm64(RV_REG_T1, -nregs_off, nr_arg_slots, ctx); > > =20 > > store_args(nr_arg_slots, args_off, ctx); > > =20 >=20 >=20