* [PATCH 2/3] clk: rockchip: add watchdog pclk on rk3328
2019-06-15 15:30 [PATCH 1/3] clk: rockchip: add clock id for watchdog pclk on rk3328 Heiko Stuebner
@ 2019-06-15 15:30 ` Heiko Stuebner
2019-06-15 15:30 ` [PATCH 3/3] arm64: dts: rockchip: enable rk3328 watchdog clock Heiko Stuebner
2019-06-27 10:40 ` [PATCH 1/3] clk: rockchip: add clock id for watchdog pclk on rk3328 Heiko Stuebner
2 siblings, 0 replies; 4+ messages in thread
From: Heiko Stuebner @ 2019-06-15 15:30 UTC (permalink / raw)
To: linux-rockchip
Cc: linux-clk, linux-arm-kernel, linux-kernel, papadakospan, sboyd,
mturquette, Heiko Stuebner
The watchdog pclk is controlled from the secure GRF but we still
want to mention it explicitly to not use arbitary parent clocks
in the devicetree wdt node, so add a SGRF_GATE for it.
Suggested-by: Leonidas P. Papadakos <papadakospan@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
drivers/clk/rockchip/clk-rk3328.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/clk/rockchip/clk-rk3328.c b/drivers/clk/rockchip/clk-rk3328.c
index 076b9777a955..c186a1985bf4 100644
--- a/drivers/clk/rockchip/clk-rk3328.c
+++ b/drivers/clk/rockchip/clk-rk3328.c
@@ -791,6 +791,9 @@ static struct rockchip_clk_branch rk3328_clk_branches[] __initdata = {
GATE(PCLK_SARADC, "pclk_saradc", "pclk_bus", 0, RK3328_CLKGATE_CON(17), 15, GFLAGS),
GATE(0, "pclk_pmu", "pclk_bus", CLK_IGNORE_UNUSED, RK3328_CLKGATE_CON(28), 3, GFLAGS),
+ /* Watchdog pclk is controlled from the secure GRF */
+ SGRF_GATE(PCLK_WDT, "pclk_wdt", "pclk_bus"),
+
GATE(PCLK_USB3PHY_OTG, "pclk_usb3phy_otg", "pclk_phy_pre", 0, RK3328_CLKGATE_CON(28), 1, GFLAGS),
GATE(PCLK_USB3PHY_PIPE, "pclk_usb3phy_pipe", "pclk_phy_pre", 0, RK3328_CLKGATE_CON(28), 2, GFLAGS),
GATE(PCLK_USB3_GRF, "pclk_usb3_grf", "pclk_phy_pre", CLK_IGNORE_UNUSED, RK3328_CLKGATE_CON(17), 2, GFLAGS),
--
2.20.1
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH 3/3] arm64: dts: rockchip: enable rk3328 watchdog clock
2019-06-15 15:30 [PATCH 1/3] clk: rockchip: add clock id for watchdog pclk on rk3328 Heiko Stuebner
2019-06-15 15:30 ` [PATCH 2/3] clk: rockchip: add " Heiko Stuebner
@ 2019-06-15 15:30 ` Heiko Stuebner
2019-06-27 10:40 ` [PATCH 1/3] clk: rockchip: add clock id for watchdog pclk on rk3328 Heiko Stuebner
2 siblings, 0 replies; 4+ messages in thread
From: Heiko Stuebner @ 2019-06-15 15:30 UTC (permalink / raw)
To: linux-rockchip
Cc: linux-clk, linux-arm-kernel, linux-kernel, papadakospan, sboyd,
mturquette, Heiko Stuebner
From: Leonidas P. Papadakos <papadakospan@gmail.com>
Add the missing clock property for the watchdog on rk3328.
Signed-off-by: Leonidas P. Papadakos <papadakospan@gmail.com>
[set wdt node to always enabled, as it is not board-specific]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index 994468671b19..e9fefd8a7e02 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -407,6 +407,7 @@
compatible = "snps,dw-wdt";
reg = <0x0 0xff1a0000 0x0 0x100>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru PCLK_WDT>;
};
pwm0: pwm@ff1b0000 {
--
2.20.1
^ permalink raw reply related [flat|nested] 4+ messages in thread