From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752928AbbJNJHN (ORCPT ); Wed, 14 Oct 2015 05:07:13 -0400 Received: from mout.kundenserver.de ([212.227.17.24]:59771 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752364AbbJNJHJ (ORCPT ); Wed, 14 Oct 2015 05:07:09 -0400 From: Arnd Bergmann To: Zhou Wang Cc: Gabriele Paoloni , Bjorn Helgaas , Bjorn Helgaas , "jingoohan1@gmail.com" , "pratyush.anand@gmail.com" , "linux@arm.linux.org.uk" , "thomas.petazzoni@free-electrons.com" , "lorenzo.pieralisi@arm.com" , "james.morse@arm.com" , "Liviu.Dudau@arm.com" , "jason@lakedaemon.net" , "robh@kernel.org" , "gabriel.fernandez@linaro.org" , "Minghuan.Lian@freescale.com" , "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , zhangjukuo , qiuzhenfa , "liudongdong (C)" , qiujiang , "xuwei (O)" , "Liguozhu (Kenneth)" , "Wangkefeng (Kevin)" , Rob Herring Subject: Re: [PATCH v10 4/6] PCI: hisi: Add PCIe host support for HiSilicon SoC Hip05 Date: Wed, 14 Oct 2015 11:06:18 +0200 Message-ID: <30775300.COZ4nEMWXC@wuerfel> User-Agent: KMail/4.11.5 (Linux/3.16.0-10-generic; KDE/4.11.5; x86_64; ; ) In-Reply-To: <561E1957.5030503@hisilicon.com> References: <1444445957-239522-1-git-send-email-wangzhou1@hisilicon.com> <11677087.JbqAo0FWJE@wuerfel> <561E1957.5030503@hisilicon.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Provags-ID: V03:K0:VNixKEigcJuOFDIJidQkGcW7YoQO/+sg15Jtt2xbtGUOxNWap0h m2gAbe4U8YlDf0YEjfew/WcKVYbsDJqjly7z/LPJ99xtt1wwDeHYHyT9CwUnYIbXHlkT0HJ aux07P7XeIHMAd1TanN+BYS2ESVw36e4fPKhxAKvp5lf8CwEavTlkK9s6R1X2qTTsp3jQYb WVvS+xqn5C2tz8jX0tocw== X-UI-Out-Filterresults: notjunk:1;V01:K0:CYZNcX/OHlc=:JE3x9sUc/3dLJvog+6HVZj crEtzH1aQ27m2UXH/uNwmUVvGd78yyrVWg1BkB6TuXeYwIyvt+kwNrxgj65c39osVEyErAfon bDSwLk9iijaJk185u9cbI1UCEkgh3aTJEaQS0hJ19z2kxv9fG5S0/VkVnWJQ81MaI+h0smH6u jjluZ1WzJBUuJFk/DWbw3/VF9Jkw96+L0KSNW76aAgmZLQL+7sVJPZalT5I+uW/c2YaH2ZSya hwEjiZy1IMrH8oW9lyBPo3qwKrzzIerJhzwAcm5GS5YKHu35NCWaPZPgcckyGVjY2yNEM3ihm KzG/TnpRGYiYi9Ys+eLaqsaIumowP3RLZ0NcWVngz4YSzmcfcz+rTxHZpovrrq4JWRyrxbKwn FUy2ZT3emjuogwOnnnM9FSEJMHiQBwt63Gus5u6QTP9m7gviAs046S8rsUEZy3nK1y89WMKza R1Qnt7AMAeEhYjDNDNhhyo8rm2kC8X/bfVYqE+S/LTuftW0WRxwtCQO/m+ne6YMBq4/eiKbWW yYcMxZYxtiU1O3dKrtCzzEB0n746vHobdMx7yMOQrgUQtKybUzZoI5nVh1WHxzYiWqK5j+iMj AscxeLqqLwJmMjOh0RqG1h1sCHSptd8m2QRaybeKuEM5M3D5xcXwsFeF0xrgsCt4+NTuvy+Dl MLr2mYNn1aYFQr1afObSFw1+PwTxatAdrx6uATksKycKr6tA1IwnRv40rVkKEUijJFTGC1SRa RJVT8BuLGJpWoEXV Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wednesday 14 October 2015 16:59:03 Zhou Wang wrote: > > Hi Arnd, > > In Hip05 PCIe host, it uses GITS_TRANSLATER's address to get TLP package > which contains MSI address and MSI data, and then combine BDF and MSI data > to a 32 bit data which will be writen to GITS_TRANSLATER register of ITS. > > I think maybe this is a defect of our PCIe controller. I'd consider it a bug in the firmware if this is not set up correctly before boot. > > I don't think what you do here is safe because the 'reg' property > > of the MSI controller might point to the address that is used for > > the message directly. > > I see your point, however we must get address of GITS_TRANSLATER and > set it to PCIe host. How about adding necessary comments here? This seems to just be static setup that should be done before Linux is even loaded. Any reason you can't do it that way? Arnd