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From: Alex Courbot <acourbot@nvidia.com>
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Subject: Re: [PATCH v6 1/4] Runtime Interpreted Power Sequences
Date: Thu, 13 Sep 2012 16:08:50 +0900
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On Thursday 13 September 2012 14:54:09 Tomi Valkeinen wrote:
> * PGP Signed by an unknown key
> 
> On Thu, 2012-09-13 at 15:36 +0900, Alex Courbot wrote:
> 
> > On Thursday 13 September 2012 14:22:57 Tomi Valkeinen wrote:
> > 
> >  
> >  
> > > However, I fear these board specific things may be quite a bit
> > > anything,
> > > so it may well be pwm, gpios and regulators are not enough for them.
> > > For
> > > example, there could be an FPGA on the board which requires some
> > > configuration to accomplish the task at hand. It could be rather
> > > difficult to handle it with a generic power sequence.
> > 
> > 
> > Right. Note that this framework is supposed to be extended - I would like
> > to at least add regulator voltage setting, and maybe even support for
> > clocks and pinmux (but that might be out of place).
> 
> 
> Yes, that's one concern of mine... I already can imagine someone
> suggesting adding conditionals to the power sequence data.

I took care of that when naming the feature - it is not a "sequence" anymore 
if you have conditionals. :P

> Perhaps also
> direct memory read/writes so you can twiddle registers directly. And so
> on. Where's the limit what it should contain? Can we soon write full
> drivers with the DT data? =)

I shall be satisfied the day the kernel is released as one big DT node along 
with the 5KB interpreter that runs it.

Alex.