From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 811862FFFA5; Wed, 12 Nov 2025 09:49:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762940943; cv=none; b=PgUiXbuD1wiXiZwGzzVecy1giRPBVQqVprWtWCzg2neDBUqrUlRsvqnCVjpkM2Wkqu83lQGLzCfw7y6qHCQDsLyYaLjaqjfSCPMeSKRtlHzPYQGzWssQ730FFRMELd0FnBzAckbPNn/vPpJCPb39V3uxhauNijoREHeb07++2cc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762940943; c=relaxed/simple; bh=cv+A0Rv4b6lrzkLMP+XQea/RkP4alO9eM9auJHAeB7k=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=UVdLpPMEfLiyeNP9nh2duVzP/AHdn8AzuK+3lTVmkQ0JwX5CJ+L+bNccG2qBMLV8y1zgn7SmuEqYulB68bjKXY+IEixJqu0WdMDydgamiQw7Dg6WlNdIkL2XJL3zTzPf+kjGEnsUMwbeNxEpvzka6qWJHNAy3eDGaPIKGmFCl8I= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=PTz8vIdx; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="PTz8vIdx" Received: by smtp.kernel.org (Postfix) with ESMTPSA id A21C8C4CEF8; Wed, 12 Nov 2025 09:48:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1762940943; bh=cv+A0Rv4b6lrzkLMP+XQea/RkP4alO9eM9auJHAeB7k=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=PTz8vIdxtSj3/VXZCWtGx5HxaUpBY+G/6h1LPqn7seq3v0wAI67GLIMDM967O/6re ex77pnTeevTT9PlHJwahNhiORDJ6SWtyvatWksBi2jd1TQD+ODzBU6/ILy6dC3sc5Y oAr/mwwxkt12d3lgDSMOlwMKoY30EqNxtsBS9h48sYdvN9P0XhkNdV2SI/nkBZIzJE Btp6k4bdwaHSY7AUexNzZS7BxL7KsmB79uETuIefoifN/Dli3p7QOXrcS+PRUGechV YXyCHuSSAfjlPesSTL9P2wxlSWmdoROX/iwB4myGfPQvLWyn57Ya48PdQvVGmynML0 MLMXq0baf3N1g== Message-ID: <312ca473-77a6-4b95-b558-bb121294fbc9@kernel.org> Date: Wed, 12 Nov 2025 10:48:57 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 4/4] arm64: dts: google: Add initial dts for frankel, blazer, and mustang To: Chen-Yu Tsai Cc: Douglas Anderson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Peter Griffin , =?UTF-8?Q?Andr=C3=A9_Draszik?= , Tudor Ambarus , linux-samsung-soc@vger.kernel.org, Roy Luo , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Julius Werner , William McVicker , linux-kernel@vger.kernel.org References: <20251111192422.4180216-1-dianders@chromium.org> <20251111112158.4.I5032910018cdd7d6be7aea78870d04c0dc381d6e@changeid> <40e67c6d-2430-483b-b4b1-0220ffbd6418@kernel.org> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 8bit On 12/11/2025 10:35, Chen-Yu Tsai wrote: > On Wed, Nov 12, 2025 at 4:14 PM Krzysztof Kozlowski wrote: >> >> On 11/11/2025 20:22, Douglas Anderson wrote: >>> Add barebones device trees for frankel (Pixel 10), blazer (Pixel 10 >>> Pro), and mustang (Pixel 10 Pro XL). These device trees are enough to >>> boot to a serial prompt using an initramfs. >>> >>> Many things can be noted about these device trees: >>> >>> 1. They are organized as "dts" files for the main SoC and "dtso" >>> overlays for the boards. There is discussion about this in the >>> bindings patch ("dt-bindings: arm: google: Add bindings for >>> frankel/blazer/mustang"). >>> 2. They won't boot with the currently shipping bootloader. The current >>> bootloader hardcodes several paths to nodes that it wants to update >>> and considers it a fatal error if it can't find these nodes. >>> Interested parties will need to wait for fixes to land and a new >>> bootloader to be rolled out before attempting to use these. >>> 3. They only add one revision (MP1) of each of frankel, blazer, and >>> mustang. With this simple barebones device tree, there doesn't >>> appear to be any difference between the revisions. More revisions >>> will be added as needed in the future. The heuristics in the >>> bootloader will pick the MP1 device tree if there are not any >>> better matches. >>> 4. They only add the dts for the B0 SoC for now. The A0 SoC support >>> can be added later if we find the need. >>> 5. Even newer versions of the bootloader will still error out if they >>> don't find a UFS node to add calibration data to. Until UFS is >>> supported, we provide a bogus UFS node for the bootloader. While >>> the bootloader could be changed, there is no long-term benefit >>> since eventually the device tree will have a UFS node. >>> 6. They purposely choose to use the full 64-bit address and size cells >>> for the root node and the `soc@0` node. Although I haven't tested >>> the need for this, I presume the arguments made in commit >>> bede7d2dc8f3 ("arm64: dts: qcom: sdm845: Increase address and size >>> cells for soc") would apply here. >>> 7. Though it looks as if the UART is never enabled, the bootloader >>> knows to enable the UART when the console is turned on. Baud rate >>> is configurable in the bootloader so is never hardcoded in the >>> device tree. >>> >>> Signed-off-by: Douglas Anderson >>> --- >>> To avoid fragmenting the discussion, IMO: >>> * Let's have the discussion about using the "dts" for SoC and the >>> "dtso" for the boards in response to the bindings (patch #1). >> >> That's discussion here, bindings are irrelevant to this. >> >>> * If we want to have a discussion about putting "board-id" and >>> "model-id" at the root of the board overlays, we can have it >>> here. I'll preemptively note that the "board-id" and "model-id" >>> won't show up in the final combined device tree and they are just >>> used by the tool (mkdtimg). We could change mkdtimg to parse the >>> "compatible" strings of the overlays files (since I've put the IDs >>> there too), but official the docs [1] seem to indicate that >>> top-level properties like this are OK. >>> >>> In order for these device trees to pass validation without warnings, >>> it's assumed you have my dtc patches: >>> * https://lore.kernel.org/r/20251110204529.2838248-1-dianders@chromium.org >>> * https://lore.kernel.org/r/20251110204529.2838248-2-dianders@chromium.org >>> >>> [1] https://git.kernel.org/pub/scm/utils/dtc/dtc.git/tree/Documentation/dt-object-internal.txt?h=main >>> >>> arch/arm64/boot/dts/google/Makefile | 9 + >>> arch/arm64/boot/dts/google/lga-b0.dts | 391 ++++++++++++++++++ >>> .../arm64/boot/dts/google/lga-blazer-mp1.dtso | 22 + >>> .../boot/dts/google/lga-frankel-mp1.dtso | 22 + >>> .../boot/dts/google/lga-mustang-mp1.dtso | 22 + >>> .../boot/dts/google/lga-muzel-common.dtsi | 17 + >>> 6 files changed, 483 insertions(+) >>> create mode 100644 arch/arm64/boot/dts/google/lga-b0.dts >>> create mode 100644 arch/arm64/boot/dts/google/lga-blazer-mp1.dtso >>> create mode 100644 arch/arm64/boot/dts/google/lga-frankel-mp1.dtso >>> create mode 100644 arch/arm64/boot/dts/google/lga-mustang-mp1.dtso >>> create mode 100644 arch/arm64/boot/dts/google/lga-muzel-common.dtsi >>> >>> diff --git a/arch/arm64/boot/dts/google/Makefile b/arch/arm64/boot/dts/google/Makefile >>> index a6b187e2d631..276001e91632 100644 >>> --- a/arch/arm64/boot/dts/google/Makefile >>> +++ b/arch/arm64/boot/dts/google/Makefile >>> @@ -1 +1,10 @@ >>> # SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) >>> + >>> +dtb-$(CONFIG_ARCH_GOOGLE) += \ >>> + lga-blazer-mp1.dtb \ >>> + lga-frankel-mp1.dtb \ >>> + lga-mustang-mp1.dtb >>> + >>> +lga-blazer-mp1-dtbs := lga-b0.dtb lga-blazer-mp1.dtbo >>> +lga-frankel-mp1-dtbs := lga-b0.dtb lga-frankel-mp1.dtbo >>> +lga-mustang-mp1-dtbs := lga-b0.dtb lga-mustang-mp1.dtbo >>> diff --git a/arch/arm64/boot/dts/google/lga-b0.dts b/arch/arm64/boot/dts/google/lga-b0.dts >>> new file mode 100644 >>> index 000000000000..83c2db4f20ef >>> --- /dev/null >>> +++ b/arch/arm64/boot/dts/google/lga-b0.dts >>> @@ -0,0 +1,391 @@ >>> +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause >>> +/* >>> + * Google Tensor G5 (laguna) SoC rev B0 >>> + * >>> + * Copyright 2024-2025 Google LLC. >>> + */ >>> + >>> +/dts-v1/; >>> + >>> +#include >>> +#include >>> + >>> +/ { >>> + model = "Google Tensor G5 rev B0"; >>> + compatible = "google,soc-id-0005-rev-10", "google,lga"; >> >> So that's SoC, thus must not be a DTS file, but DTSI. >> >> ... >> >> >> ... >> >> >>> diff --git a/arch/arm64/boot/dts/google/lga-frankel-mp1.dtso b/arch/arm64/boot/dts/google/lga-frankel-mp1.dtso >>> new file mode 100644 >>> index 000000000000..133494de7a9b >>> --- /dev/null >>> +++ b/arch/arm64/boot/dts/google/lga-frankel-mp1.dtso >> >> And that's a board, so DTS. >> >>> @@ -0,0 +1,22 @@ >>> +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause >>> +/* >>> + * Google Pixel 10 (frankel) MP 1 >>> + * >>> + * Copyright 2024-2025 Google LLC. >>> + */ >>> + >>> +/dts-v1/; >>> +/plugin/; >>> + >>> +#include "lga-muzel-common.dtsi" >>> + >>> +/ { >>> + board-id = <0x070306>; >>> + board-rev = <0x010000>; >> >> Undocumented ABI, which you cannot document because these properties are >> not allowed. You cannot have them. > > This is part of the discussion I want to have at Plumbers. But I suppose > we can start here. Then the patch should be called RFC as not yet ready for merging. :) > > The Android DTB partition format uses six 32-bit integers for matching, > as opposed to a compatible string used in FIT images. Two of the integers > are the "id" and "rev" numbers in the example above. The remaining four > are custom and left up to the (vendor) bootloader implementation. > > The values for these fields need to be stored somewhere with the .dts. > The compiled DTB is useless if the user cannot build a proper image for > the bootloader to consume, and that involves putting in the right numbers > in these fields. The android "mkdtimg" tool can either take the values > from some known properties within the DTB, or have them fed to it > externally. > > So if we don't want these numbers in the dts itself, then we should come > up with some format to store them beside the dts files. Re-iterating comment from Rob long time ago: adding such new properties is fine, but they must come for more than one user and be universal across these users. And of course the ABI needs to be documented which did not happen here. I indeed said incorrectly that "properties are not allowed". The properties could be allowed if we document them according to above Rob's comment, but that did not happen. Adding these properties per one SoC vendor is not really allowed, like qcom,board-id and qcom,msm-id, but maybe you intend to make it generic. > > > On a similar note, we would have a similar problem with FIT images and > overlays. The FIT image format maps a (series of) compatible string(s) > to one DTB and any number of overlays. If overlays are involved, then > the compatible string cannot come from the DTB itself, and the mapping > must be stored somewhere. I recall, although cannot find now references to, a email talk on the list saying that such overlays should have their own compatible, thus solving this mapping problem. Best regards, Krzysztof