Re: [PATCH v1 2/9] dt-bindings: memory: Document Tegra114 Memory Controller

[Krzysztof Kozlowski <krzk@kernel.org>]

On 25/02/2025 15:34, Svyatoslav Ryhel wrote:
> +
> +properties:
> +  compatible:
> +    const: nvidia,tegra114-mc
> +
> +  reg:
> +    maxItems: 1
> +
> +  clocks:
> +    maxItems: 1
> +
> +  clock-names:
> +    items:
> +      - const: mc

Drop clock-names, not really useful if it copies device name.

> +
> +  interrupts:
> +    maxItems: 1
> +
> +  "#reset-cells":
> +    const: 1
> +
> +  "#iommu-cells":
> +    const: 1
> +
> +  "#interconnect-cells":
> +    const: 1
> +
> +patternProperties:
> +  "^emc-timings-[0-9]+$":
> +    type: object
> +    properties:
> +      nvidia,ram-code:
> +        $ref: /schemas/types.yaml#/definitions/uint32
> +        description:
> +          Value of RAM_CODE this timing set is used for.

This spreads to multiple bindings now. This really needs to be in shared
schema.

> +
> +    patternProperties:
> +      "^timing-[0-9]+$":
> +        type: object
> +        properties:
> +          clock-frequency:
> +            description:
> +              Memory clock rate in Hz.
> +            minimum: 1000000
> +            maximum: 1066000000

clock-frequency is a legacy property, not really desired for new
bindings. Memory controllers can operate with different speed, so how do
you factor this here?

BTW, same review could have been given last time and you will be deemed
to repeat everything, unless this is captured in description or commit msg.

Best regards,
Krzysztof