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Subject: Re: [PATCH v5 4/5] KVM: VMX: Allow direct access to
 MSR_IA32_SPEC_CTRL
To: David Woodhouse <dwmw2@infradead.org>, Jim Mattson <jmattson@google.com>
Cc: KarimAllah Ahmed <karahmed@amazon.com>,
 KarimAllah Ahmed <karahmed@amazon.de>, kvm list <kvm@vger.kernel.org>,
 LKML <linux-kernel@vger.kernel.org>,
 the arch/x86 maintainers <x86@kernel.org>,
 Asit Mallick <asit.k.mallick@intel.com>,
 Arjan Van De Ven <arjan.van.de.ven@intel.com>,
 Dave Hansen <dave.hansen@intel.com>, Andi Kleen <ak@linux.intel.com>,
 Andrea Arcangeli <aarcange@redhat.com>,
 Linus Torvalds <torvalds@linux-foundation.org>,
 Tim Chen <tim.c.chen@linux.intel.com>, Thomas Gleixner <tglx@linutronix.de>,
 Dan Williams <dan.j.williams@intel.com>,
 Jun Nakajima <jun.nakajima@intel.com>, Greg KH <gregkh@linuxfoundation.org>,
 Andy Lutomirski <luto@kernel.org>, Ashok Raj <ashok.raj@intel.com>
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From: Paolo Bonzini <pbonzini@redhat.com>
Message-ID: <337b9577-50bc-412f-3cf3-7d366755aa76@redhat.com>
Date: Thu, 1 Feb 2018 09:09:01 -0500
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On 31/01/2018 16:59, David Woodhouse wrote:
> 
> 
> On Wed, 2018-01-31 at 13:53 -0800, Jim Mattson wrote:
>> On Wed, Jan 31, 2018 at 1:42 PM, Paolo Bonzini <pbonzini@redhat.com> wrote:
>>
>>> Can we just say it sucks to be L2 too? :)  Because in the end as long as
>>> no one ever writes to spec_ctrl, everybody is happy.
>>
>> Unfortunately, quite a few OS vendors shipped IBRS-based mitigations
>> earlier this month. (Has Redhat stopped writing to IA32_SPEC_CTRL yet?
>> :-)
>>
>> And in the long run, everyone is going to set IA32_SPEC_CTRL.IBRS=1 on
>> CPUs with IA32_ARCH_CAPABILITIES.IBRS_ALL.
> 
> 
> I'm actually working on IBRS_ALL at the moment.
> 
> I was tempted to *not* let the guests turn it off. Expose SPEC_CTRL but
> just make it a no-op.

That would be very slow.

> Or if that really doesn't fly, perhaps with IBRS_ALL we should invert
> the logic. Set IBRS to 1 on vCPU reset, and only if it's set to *zero*
> do we pass through the MSR and set the save_spec_ctrl_on_exit flag.

... but something like that would be a good idea.  Even if IBRS to 0 on
vCPU reset, only pass it through once it's set to zero.  The first
IBRS=1 write would not enable pass through, and would not set the
save_spec_ctrl_on_exit flag.  In fact it need not even be conditional on
IBRS_ALL.

Paolo

> But let's get the code for *current* hardware done first...
>