From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BCD40C433EF for ; Tue, 12 Oct 2021 15:41:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A22EA6108F for ; Tue, 12 Oct 2021 15:41:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237586AbhJLPnq (ORCPT ); Tue, 12 Oct 2021 11:43:46 -0400 Received: from gloria.sntech.de ([185.11.138.130]:37328 "EHLO gloria.sntech.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237246AbhJLPnf (ORCPT ); Tue, 12 Oct 2021 11:43:35 -0400 Received: from ip5f5a6e92.dynamic.kabel-deutschland.de ([95.90.110.146] helo=diego.localnet) by gloria.sntech.de with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1maJu8-0006eg-Og; Tue, 12 Oct 2021 17:41:24 +0200 From: Heiko =?ISO-8859-1?Q?St=FCbner?= To: guoren@kernel.org, anup@brainfault.org, atish.patra@wdc.com, maz@kernel.org, tglx@linutronix.de, palmer@dabbelt.com, linux-riscv@lists.infradead.org Cc: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Guo Ren , Rob Herring , Palmer Dabbelt , guoren@kernel.org Subject: Re: [PATCH V2 1/2] dt-bindings: update riscv plic compatible string Date: Tue, 12 Oct 2021 17:41:23 +0200 Message-ID: <3384738.8kAFQ6LgSR@diego> In-Reply-To: <20211012153432.2817285-1-guoren@kernel.org> References: <20211012153432.2817285-1-guoren@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Am Dienstag, 12. Oktober 2021, 17:34:31 CEST schrieb guoren@kernel.org: > From: Guo Ren > > Add the compatible string "thead,c9xx-plic" to the riscv plic > bindings to support SOCs with thead,c9xx processor cores. > > Signed-off-by: Guo Ren > Cc: Rob Herring > Cc: Palmer Dabbelt > Cc: Anup Patel > Cc: Atish Patra > --- > .../bindings/interrupt-controller/sifive,plic-1.0.0.yaml | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml > index 08d5a57ce00f..202eb7666f9b 100644 > --- a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml > +++ b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml > @@ -46,6 +46,7 @@ properties: > - enum: > - sifive,fu540-c000-plic > - canaan,k210-plic > + - thead,c9xx-plic Devicetree bindings shouldn't use asterisks (the xx-part). Instead you want (probably) + - thead,c906-plic + - thead,c910-plic to name the specific SoCs that plic is used on Heiko > - const: sifive,plic-1.0.0 > > reg: >