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X-CSE-ConnectionGUID: NT90TqNBQ1+QB9SjvUWpng== X-CSE-MsgGUID: Crl1uriZQs6udu2xpl1MLg== X-IronPort-AV: E=McAfee;i="6800,10657,11584"; a="74176723" X-IronPort-AV: E=Sophos;i="6.19,234,1754982000"; d="scan'208";a="74176723" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Oct 2025 09:40:05 -0700 X-CSE-ConnectionGUID: d6aGCxqXSIuq0+rX+521og== X-CSE-MsgGUID: O3GEdB1FQsSNk/Pamay9jw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,234,1754982000"; d="scan'208";a="187781454" Received: from slindbla-desk.ger.corp.intel.com (HELO localhost) ([10.245.246.155]) by fmviesa004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Oct 2025 09:40:00 -0700 From: Jani Nikula To: Yaroslav Bolyukin , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter Cc: Harry Wentland , Leo Li , Rodrigo Siqueira , Alex Deucher , Christian =?utf-8?Q?K=C3=B6nig?= , Wayne Lin , amd-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Yaroslav Bolyukin Subject: Re: [PATCH v4 2/2] drm/amd: use fixed dsc bits-per-pixel from edid In-Reply-To: <20251016001038.13611-6-iam@lach.pw> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo References: <20251016001038.13611-2-iam@lach.pw> <20251016001038.13611-6-iam@lach.pw> Date: Thu, 16 Oct 2025 19:39:57 +0300 Message-ID: <34407e8d423f0d00e949ba8c6b209cb88e8f5414@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain On Thu, 16 Oct 2025, Yaroslav Bolyukin wrote: > VESA vendor header from DisplayID spec may contain fixed bit per pixel > rate, it should be respected by drm driver > > Signed-off-by: Yaroslav Bolyukin > --- > drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 14 +++++++++++++- > 1 file changed, 13 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > index 0d03e324d5b9..ebe5bb4eecf8 100644 > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > @@ -6521,6 +6521,11 @@ static void fill_stream_properties_from_drm_display_mode( > > stream->output_color_space = get_output_color_space(timing_out, connector_state); > stream->content_type = get_output_content_type(connector_state); > + > + /* DisplayID Type VII pass-through timings. */ > + if (mode_in->dsc_passthrough_timings_support && info->dp_dsc_bpp != 0) { > + stream->timing.dsc_fixed_bits_per_pixel_x16 = info->dp_dsc_bpp; > + } If we had mode->dp_dsc_bpp_x16 directly, or something better named, this would be simpler. This will eventually be replicated in a bunch of drivers. BR, Jani. > } > > static void fill_audio_info(struct audio_info *audio_info, > @@ -7067,6 +7072,13 @@ create_stream_for_sink(struct drm_connector *connector, > &mode, preferred_mode, scale); > > preferred_refresh = drm_mode_vrefresh(preferred_mode); > + > + /* > + * HACK: In case of multiple supported modes, we should look at the matching mode to decide this flag. > + * But what is matching mode, how should it be decided? > + * Assuming that only preferred mode would have this flag. > + */ > + mode.dsc_passthrough_timings_support = preferred_mode->dsc_passthrough_timings_support; > } > } > > @@ -7756,7 +7768,7 @@ create_validate_stream_for_sink(struct drm_connector *connector, > drm_dbg_kms(connector->dev, "%s:%d Validation failed with %d, retrying w/ YUV420\n", > __func__, __LINE__, dc_result); > aconnector->force_yuv420_output = true; > - } > +} > stream = create_validate_stream_for_sink(connector, drm_mode, > dm_state, old_stream); > aconnector->force_yuv422_output = false; -- Jani Nikula, Intel