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Wed, 20 Aug 2025 09:19:08 GMT Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DDF9120049; Wed, 20 Aug 2025 09:19:07 +0000 (GMT) Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id AF04520040; Wed, 20 Aug 2025 09:19:07 +0000 (GMT) Received: from [9.152.224.87] (unknown [9.152.224.87]) by smtpav06.fra02v.mail.ibm.com (Postfix) with ESMTP; Wed, 20 Aug 2025 09:19:07 +0000 (GMT) Message-ID: <353d1dc7e3c4e9b5f127ac9177a863d8a8cde39f.camel@linux.ibm.com> Subject: Re: [PATCH v15 1/6] PCI: Clean up __pci_find_next_cap_ttl() readability From: Gerd Bayer To: Hans Zhang <18255117159@163.com>, lpieralisi@kernel.org, kwilczynski@kernel.org, bhelgaas@google.com, helgaas@kernel.org, jingoohan1@gmail.com, mani@kernel.org Cc: robh@kernel.org, ilpo.jarvinen@linux.intel.com, schnelle@linux.ibm.com, lukas@wunner.de, arnd@kernel.org, geert@linux-m68k.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Date: Wed, 20 Aug 2025 11:19:07 +0200 In-Reply-To: <20250813144529.303548-2-18255117159@163.com> References: <20250813144529.303548-1-18255117159@163.com> <20250813144529.303548-2-18255117159@163.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.56.2 (3.56.2-1.fc42) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: jNvYtlxzmnSVTPRMRPIh6Oau072Cl6SZ X-Authority-Analysis: v=2.4 cv=IrhHsL/g c=1 sm=1 tr=0 ts=68a5930f cx=c_pps a=bLidbwmWQ0KltjZqbj+ezA==:117 a=bLidbwmWQ0KltjZqbj+ezA==:17 a=IkcTkHD0fZMA:10 a=2OwXVqhp2XgA:10 a=Byx-y9mGAAAA:8 a=VwQbUJbxAAAA:8 a=VnNF1IyMAAAA:8 a=BGCEjKcQT-SkztS5gqMA:9 a=QEXdDO2ut3YA:10 a=cPQSjfK2_nFv0Q5t_7PE:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODE5MDIyMiBTYWx0ZWRfX40yHxzNV/pv2 4HcAvQ3jHti8C0rDaf71tPBrB5WxfmHQAmigkzLeK3jFzseO3P2OZfzzkqtVrcpzYlMEPO+NRBc c2v14I089Opn18wlBoF9ecYqGxvBo8dZCmiaPHAgbuJILBQJS8wad99RWCTYqVNhp/V4cf5ZdLk yDLQ+S+6+KIubMr1SUddB2gUQjICAN0AlhrLkPV6j20UZ30i/tV29XjAl/Pwk6bivskT7zFXFa6 N5tNBjWkaNMDkZ8yPbUq9xaZnYLTGJT3IxupoaOqEwDgJXIrUXBAvJEfj2Q3RGJWf+ixhC4WZ3O uB7nBwEu75lZtBMVWym0pl/v47fEuZBE6kBC4tHu8zzxtpJJTfiUDM4q1I/uCuqqqd/k+DHBQ3N XJcACgmMnbZVvuKcM4TSkNbTZQGzkA== X-Proofpoint-ORIG-GUID: f2tGAf0Lm2ajHpvep3oaoeiMdfCXOSDx X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-20_03,2025-08-20_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 malwarescore=0 bulkscore=0 suspectscore=0 spamscore=0 lowpriorityscore=0 impostorscore=0 adultscore=0 priorityscore=1501 clxscore=1011 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2508110000 definitions=main-2508190222 On Wed, 2025-08-13 at 22:45 +0800, Hans Zhang wrote: > Refactor the __pci_find_next_cap_ttl() to improve code clarity: > - Replace magic number 0x40 with PCI_STD_HEADER_SIZEOF. > - Use ALIGN_DOWN() for position alignment instead of manual bitmask. > - Extract PCI capability fields via FIELD_GET() with standardized masks. > - Add necessary headers (linux/align.h). >=20 > No functional changes intended. >=20 > Signed-off-by: Hans Zhang <18255117159@163.com> > Acked-by: Manivannan Sadhasivam > --- > drivers/pci/pci.c | 9 +++++---- > include/uapi/linux/pci_regs.h | 3 +++ > 2 files changed, 8 insertions(+), 4 deletions(-) >=20 > diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c > index b0f4d98036cd..40a5c87d9a6b 100644 > --- a/drivers/pci/pci.c > +++ b/drivers/pci/pci.c > @@ -9,6 +9,7 @@ > */ > =20 > #include > +#include > #include > #include > #include > @@ -432,17 +433,17 @@ static u8 __pci_find_next_cap_ttl(struct pci_bus *b= us, unsigned int devfn, > pci_bus_read_config_byte(bus, devfn, pos, &pos); > =20 > while ((*ttl)--) { > - if (pos < 0x40) > + if (pos < PCI_STD_HEADER_SIZEOF) > break; > - pos &=3D ~3; > + pos =3D ALIGN_DOWN(pos, 4); > pci_bus_read_config_word(bus, devfn, pos, &ent); > =20 > - id =3D ent & 0xff; > + id =3D FIELD_GET(PCI_CAP_ID_MASK, ent); > if (id =3D=3D 0xff) > break; > if (id =3D=3D cap) > return pos; > - pos =3D (ent >> 8); > + pos =3D FIELD_GET(PCI_CAP_LIST_NEXT_MASK, ent); > } > return 0; > } > diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.= h > index f5b17745de60..1bba99b46227 100644 > --- a/include/uapi/linux/pci_regs.h > +++ b/include/uapi/linux/pci_regs.h > @@ -207,6 +207,9 @@ > =20 > /* Capability lists */ > =20 > +#define PCI_CAP_ID_MASK 0x00ff /* Capability ID mask */ > +#define PCI_CAP_LIST_NEXT_MASK 0xff00 /* Next Capability Pointer mask */ > + > #define PCI_CAP_LIST_ID 0 /* Capability ID */ > #define PCI_CAP_ID_PM 0x01 /* Power Management */ > #define PCI_CAP_ID_AGP 0x02 /* Accelerated Graphics Port */ Hi Hans, I like your approach to replace the magic numbers here. If you went further to replace the single pci_bus_read_config_word() with two single-byte reads at the appropriate places - for CAP_ID and CAP_LIST_NEXT - you could even go with the already existing offset defines PCI_CAP_LIST_ID and PCI_CAP_LIST_NEXT from pci_regs.h. But that might be a more intricate change and involves more HW accesses than what it's worth. So feel free to add my Reviewed-by: Gerd Bayer Thanks, Gerd