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Wysocki" , linux-pm@vger.kernel.org, LKML , Daniel Lezcano , Amit Kucheria , Zhang Rui , Christophe JAILLET Subject: Re: [PATCH v5 6/8] PCI/bwctrl: Add API to set PCIe Link Speed In-Reply-To: <20240509125358.00004c55@Huawei.com> Message-ID: <3555fc97-baec-282f-0a93-4a22f67254e9@linux.intel.com> References: <20240508134744.52134-1-ilpo.jarvinen@linux.intel.com> <20240508134744.52134-7-ilpo.jarvinen@linux.intel.com> <20240509125358.00004c55@Huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="8323328-643942565-1715337168=:1562" This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323328-643942565-1715337168=:1562 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: QUOTED-PRINTABLE On Thu, 9 May 2024, Jonathan Cameron wrote: > On Wed, 8 May 2024 16:47:42 +0300 > Ilpo J=E4rvinen wrote: >=20 > > Currently, PCIe Link Speeds are adjusted by custom code rather than in > > a common function provided in PCI core. PCIe bandwidth controller > > (bwctrl) introduces an in-kernel API to set PCIe Link Speed. Convert > > Target Speed quirk to use the new API. > >=20 > > The new API is also intended to be used in an upcoming commit that adds > > a thermal cooling device to throttle PCIe bandwidth when thermal > > thresholds are reached. > >=20 > > The PCIe bandwidth control procedure is as follows. The highest speed > > supported by the Port and the PCIe device which is not higher than the > > requested speed is selected and written into the Target Link Speed in > > the Link Control 2 Register. Then bandwidth controller retrains the > > PCIe Link. > >=20 > > Bandwidth Notifications enable the cur_bus_speed in the struct pci_bus > > to keep track PCIe Link Speed changes. While Bandwidth Notifications > > should also be generated when bandwidth controller alters the PCIe Link > > Speed, a few platforms do not deliver LMBS interrupt after Link > > Training as expected. Thus, after changing the Link Speed, bandwidth > > controller makes additional read for the Link Status Register to ensure > > cur_bus_speed is consistent with the new PCIe Link Speed. > >=20 > > Signed-off-by: Ilpo J=E4rvinen > > --- > > drivers/pci/pci.h | 13 ++++ > > drivers/pci/pcie/Makefile | 2 +- > > drivers/pci/pcie/bwctrl.c | 147 ++++++++++++++++++++++++++++++++++++++ > > drivers/pci/quirks.c | 12 +--- > > include/linux/pci.h | 3 + > > 5 files changed, 166 insertions(+), 11 deletions(-) > >=20 > > diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h > > index 416540baf27b..324899fbad0a 100644 > > --- a/drivers/pci/pci.h > > +++ b/drivers/pci/pci.h > > @@ -270,6 +270,19 @@ void pci_disable_bridge_window(struct pci_dev *dev= ); > > struct pci_bus *pci_bus_get(struct pci_bus *bus); > > void pci_bus_put(struct pci_bus *bus); > > =20 > > +#define PCIE_LNKCAP_SLS2SPEED(lnkcap)=09=09=09=09=09\ > > +({=09=09=09=09=09=09=09=09=09\ > > +=09u32 _lnkcap =3D (lnkcap) & PCI_EXP_LNKCAP_SLS;=09=09=09\ >=20 > Why the inconsistency wrt to PCIE_LNKCAP2_SLS2SPEED which doesn't bother = with > this initial mask. It's not needed afterall as the bits checked are all i= n the > mask anyway? >=20 > I don't really mind which form but they should look the same. I made it the same as PCIE_LNKCAP2_SLS2SPEED() as it's like you say,=20 it checks explicit bits so the other bits don't matter. --=20 i. > > +=09=09=09=09=09=09=09=09=09\ > > +=09(_lnkcap =3D=3D PCI_EXP_LNKCAP_SLS_64_0GB ? PCIE_SPEED_64_0GT :=09\ > > +=09 _lnkcap =3D=3D PCI_EXP_LNKCAP_SLS_32_0GB ? PCIE_SPEED_32_0GT :=09\ > > +=09 _lnkcap =3D=3D PCI_EXP_LNKCAP_SLS_16_0GB ? PCIE_SPEED_16_0GT :=09\ > > +=09 _lnkcap =3D=3D PCI_EXP_LNKCAP_SLS_8_0GB ? PCIE_SPEED_8_0GT :=09\ > > +=09 _lnkcap =3D=3D PCI_EXP_LNKCAP_SLS_5_0GB ? PCIE_SPEED_5_0GT :=09\ > > +=09 _lnkcap =3D=3D PCI_EXP_LNKCAP_SLS_2_5GB ? PCIE_SPEED_2_5GT :=09\ > > +=09 PCI_SPEED_UNKNOWN);=09=09=09=09=09=09\ > > +}) > > + >=20 >=20 >=20 --8323328-643942565-1715337168=:1562--