From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.6 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 385BECA90AF for ; Tue, 12 May 2020 17:46:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 04C1E206A5 for ; Tue, 12 May 2020 17:46:48 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="AdMt0Mqy" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730672AbgELRqr (ORCPT ); Tue, 12 May 2020 13:46:47 -0400 Received: from mail27.static.mailgun.info ([104.130.122.27]:33694 "EHLO mail27.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725950AbgELRqq (ORCPT ); Tue, 12 May 2020 13:46:46 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1589305605; h=Message-ID: References: In-Reply-To: Subject: Cc: To: From: Date: Content-Transfer-Encoding: Content-Type: MIME-Version: Sender; bh=3aBaEIECgRDmS2ZgIu590wveJw/9XS2o1jwt2Ngu7M0=; b=AdMt0MqybRI81l/tqIh83WE808nwuVOs/xYxcP1BNu0qQQM1RyWyTLuXx1b2F3+Vql5Qie0o 0aEhQ8o6yuZd9HwJQYbaGuhNzCdh7PpcV4DsT9CbXGgM0e1C7eRShSp4zqj2veTVF7sA5EGY AhuxlmwtDlttLUIXhPoQ/vlWEBc= X-Mailgun-Sending-Ip: 104.130.122.27 X-Mailgun-Sid: WyI0MWYwYSIsICJsaW51eC1rZXJuZWxAdmdlci5rZXJuZWwub3JnIiwgImJlOWU0YSJd Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by mxa.mailgun.org with ESMTP id 5ebae0f7.7f97a0e7b730-smtp-out-n03; Tue, 12 May 2020 17:46:31 -0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1001) id BB116C433CB; Tue, 12 May 2020 17:46:30 +0000 (UTC) Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: saiprakash.ranjan) by smtp.codeaurora.org (Postfix) with ESMTPSA id 7D88DC43636; Tue, 12 May 2020 17:46:29 +0000 (UTC) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Tue, 12 May 2020 23:16:29 +0530 From: Sai Prakash Ranjan To: Mike Leach Cc: Suzuki K Poulose , Mathieu Poirier , Stephen Boyd , Linux Kernel Mailing List , linux-arm-msm@vger.kernel.org, linux-arm-kernel , Russell King Subject: Re: [PATCH] coresight: dynamic-replicator: Fix handling of multiple connections In-Reply-To: References: <20200426143725.18116-1-saiprakash.ranjan@codeaurora.org> <84918e7d-c933-3fa1-a61e-0615d4b3cf2c@arm.com> <668ea1283a6dd6b34e701972f6f71034@codeaurora.org> <5b0f5d77c4eec22d8048bb0ffa078345@codeaurora.org> <759d47de-2101-39cf-2f1c-cfefebebd548@arm.com> <7d343e96cf0701d91152fd14c2fdec42@codeaurora.org> <47f6d51bfad0a0bf1553e101e6a2c8c9@codeaurora.org> <37b3749e-2363-0877-c318-9c334a5d1881@arm.com> Message-ID: <364049a30dc9d242ec611bf27a16a6c9@codeaurora.org> X-Sender: saiprakash.ranjan@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Mike, On 2020-05-12 17:19, Mike Leach wrote: [...] >> >> >> >> Sorry for hurrying up and sending the patch - >> >> https://lore.kernel.org/patchwork/patch/1239923/. >> >> I will send v2 based on further feedbacks here or there. >> >> >> >>> >> >>> 1) does this replicator part have a unique ID that differs from the >> >>> standard ARM designed replicators? >> >>> If so perhaps link the modification into this. (even if the part no >> >>> in >> >>> PIDR0/1 is the same the UCI should be different for a different >> >>> implementation) >> >>> > I have reviewed the replicator driver, and compared to all the other CS > drivers. > This driver appears to be the only one that sets hardware values in > probe() and expects them to remain in place on enable, and uses that > state for programming decisions later, despite telling the PM > infrastructure that it is clear to suspend the device. > > Now we have a system where the replicator hardware is behaving > differently under the driver, but is it behaving unreasonably? Thanks for taking your time to review this. For new replicator behaving unreasonably, I think the assumption that the context is not lost on disabling clock is flawed since its implementation defined. Is such assumption documented in any TRM? >> >> >> >> pid=0x2bb909 for both replicators. So part number is same. >> >> UCI will be different for different implementation(QCOM maybe >> >> different from ARM), >> >> but will it be different for different replicators under the same >> >> impl(i.e., on QCOM). >> > >> > May be use PIDR4.DES_2 to match the Implementor and apply the work >> > around for all QCOM replicators ? >> > >> > To me that sounds the best option. >> > >> > > I agree, if it can be established that the register values that make > up UCI (pid0-4, devarch, devtype, PID:CLASS==0x9), can correctly > identify the parts then a flag can be set in the probe() function and > acted on during the enable() function. > So here I have a doubt as to why we need to use UCI because PID = 0x2bb909 and CID = 0xb105900d are same for both replicators, so UCI won't identify the different replicators(in same implementation i.e., on QCOM) here. Am I missing something? Thats why I think Suzuki suggested to use PIDR4_DES2 and check for QCOM impl and add a workaround for all replicators, something like below: (will need cleaning) #define PIDR4_DES2 0xFD0 if (FIELD_GET(GENMASK(3, 0), readl_relaxed(drvdata->base + PIDR4_DES2)) == 0x4) id0val = id1val = 0xff; ... and the rest as you suggested. > > This was a design decision made by the original driver writer. A > normal AMBA device should not lose context due to clock removal (see > drivers/amba/bus.c), so resetting in probe means this operation is > done only once, rather than add overhead in the enable() function,and > later decisions can be made according to the state of the registers > set. > > As you have pointed out, for this replicator implementation the > context is unfortunately not retained when clocks are removed - so an > alternative method is required. > > perhaps something like:- > > probe() > ... > if (match_id_non_persistent_state_regs(ID)) > drvdata->check_filter_val_on_enable; > .... > > and a re-write of enable:- > > enable() > ... > CS_UNLOCK() > id0val = read(IDFILTER0); > id1val = read(IDFILTER1); > > /* some replicator designs lose context when AMBA clocks are removed - > check for this */ > if (drvdata->check_filter_val_on_enable && (id0val == id1val == 0x0)) > id0val = id1val = 0xff; > > if(id0xal == id1val == 0xff) > rc = claim_device() > > if (!rc) > switch (outport) > case 0: id0val = 0x0; break > case 1: id1va; = 0x0; break; > default: rc = -EINVAL; > > if (!rc) > write(id0val); > write(id1val); > CS_LOCK() > return rc; > .... > Thanks for this detailed idea for workaround. I will add this once we know whether we need to use UCI or PIDR4_DES2. > Given that the access to the enable() function is predicated on a > reference count per active port, there is also a case for dropping the > check_filter_val_on_enable flag completely - once one port is active, > then the device will remain enabled until both ports are inactive. > This still allows for future development of selective filtering per > port. > > One other point here - there is a case as I mentioned above for moving > to a stored value model for the driver - as this is the only coresight > driver that appears to set state in the probe() function rather than > write all on enable. > This however would necessitate a more comprehensive re-write. > I would defer this to experts as you or suzuki will have more idea regarding this than me. Thanks, Sai -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation