From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754840AbbIWT2a (ORCPT ); Wed, 23 Sep 2015 15:28:30 -0400 Received: from mout.kundenserver.de ([212.227.126.187]:65510 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751988AbbIWT22 (ORCPT ); Wed, 23 Sep 2015 15:28:28 -0400 From: Arnd Bergmann To: linux-arm-kernel@lists.infradead.org Cc: David Daney , Will Deacon , Mark Rutland , "devicetree@vger.kernel.org" , Pawel Moll , Ian Campbell , Marc Zyngier , "linux-pci@vger.kernel.org" , David Daney , "linux-kernel@vger.kernel.org" , Rob Herring , David Daney , Kumar Gala , Bjorn Helgaas Subject: Re: [PATCH v2 4/5] PCI: generic: Correct, and avoid overflow, in bus_max calculation. Date: Wed, 23 Sep 2015 21:27:41 +0200 Message-ID: <3751968.n8LRgots8n@wuerfel> User-Agent: KMail/4.11.5 (Linux/3.16.0-10-generic; KDE/4.11.5; x86_64; ; ) In-Reply-To: <5602EDC4.3040603@caviumnetworks.com> References: <1442527332-1174-1-git-send-email-ddaney.cavm@gmail.com> <20150923180157.GV7356@arm.com> <5602EDC4.3040603@caviumnetworks.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Provags-ID: V03:K0:1QTgK8+u56Lr50XOr4xWYg5QGz9QTPFmJC5merb4XIQMDtyqxkA 4fyKY1xgj6XsNV/zirNZT1B+kJmUpqIBnwUskFAfFUyfRhGxiDmruXOt3+yj54FXn+spFiz SQ/wb9vxFvU+EizJ/XbF54xhXM42Rw4tu1A6pPt8lPPa27jF7iP9BYy5KXY3hNGs4dAPE4z ewhOCAy1235OTJ18NubKQ== X-UI-Out-Filterresults: notjunk:1;V01:K0:U+Pav7LO2Kw=:X61CGdTiHvcgzpsPb8TwjF RcnKjvkne4i68Ha6+mMCy37EFDhT1U/2ist3h3hvYYdJr4EzjAJWUPcg/c6BgTmcE914CFF9Y T0XccQ2JISiww+fvPSTjpUAxNOsYY/atJkQ+8og3Leqo68ZSBQhVMH5Ud5UmVYIuVQoxhZ+sq Kg7f/sUpwnN/5Xh+SQa0TA2goKi1NDL5R8KS8gPjJgvYiVdb6xAIMCinHaSZ3yAibM9bL5NAZ EIb6biincKEpptiBbVgl1KIiI8NBMpJgv75pMuv+hiTLhVYjyjpdjI6ni6oRl7tuAlYnuJAUc /k5KplYtiKZEfwwlLqHqKHFqNQGR1JwTB7hOUON7KzzDykabHh9Fd0Wz/TnwzjcMmdsL0+C6J sZ5c8IoRr6h8fsbIrdgtcDLJHsYM6jr+c4c+oj1CyxrXflb8w7Ke9ACyrlYuxcSRkZ7hIPdAc SZekh0jc3HS9H9cZIGUfsgCJD+Zw/CXNnJHr0+U58LKp4diHm8+8EpHF6BHNq2asNqfnjlmbN hcE8POinIjtcdDqK+PW2c0IoMcRNBgxJTHFA1o26I9RiiMhVr1L9fRMHIXHXLZ0Bt4Jf8Rh1s AHKckLnHCRlfCwlIrIAhhugk8gbEqegFj+v7/ODRESi8jL/On/dedsQlgBF++he2X8zyh2qtu o5bzghZRStjbxngIU4B20Arv/UzobDeLTv9j5ZHQ/UNg8EL6a2GexVYnF/FLQ4o7BmE0+bx/U 5uRGN+PWg8YEJEN6 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wednesday 23 September 2015 11:21:56 David Daney wrote: > >> > >> /* Limit the bus-range to fit within reg */ > >> - bus_max = pci->cfg.bus_range->start + > >> - (resource_size(&pci->cfg.res) >> pci->cfg.ops.bus_shift) - 1; > >> + bus_max = (resource_size(&pci->cfg.res) >> pci->cfg.ops.bus_shift) - 1; > >> + if (bus_max > 255) > >> + bus_max = 255; > > > > I still don't understand the need for this part. If the cfg space is bigger > > than bus_max, isn't that simply an invalid resource? Given that the resource > > could be broken in other ways too, this check feels more like a specific > > workaround rather than generally useful code. > > Imagine... > > bus-range [0x80 .. 0xff], this requires a cfg.res that will cover the > entire range of 0..0xff. > > according to the calculations above, (resource_size(&pci->cfg.res) >> > pci->cfg.ops.bus_shift) - 1 will have a value of 0xff, so... Extending the computation to 32 bit seems fine, but I'd rather warn loudly if the bus range does not fit within the registers. Also note that the computation is already correct with my interpretation of the reg property. Arnd