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[213.161.3.76]) by smtp.gmail.com with ESMTPSA id r17-20020a056402019100b0043a9144d8ecsm6650252edv.71.2022.07.12.14.25.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 Jul 2022 14:25:12 -0700 (PDT) From: Jernej =?utf-8?B?xaBrcmFiZWM=?= To: Ezequiel Garcia Cc: mripard@kernel.org, paul.kocialkowski@bootlin.com, wens@csie.org, samuel@sholland.org, mchehab@kernel.org, gregkh@linuxfoundation.org, hverkuil-cisco@xs4all.nl, linux-media@vger.kernel.org, linux-staging@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Subject: Re: Re: [PATCH 5/7] media: cedrus: h265: Add a couple of error checks Date: Tue, 12 Jul 2022 23:25:00 +0200 Message-ID: <37675481.J2Yia2DhmK@kista> In-Reply-To: References: <20220620175517.648767-1-jernej.skrabec@gmail.com> <20220620175517.648767-6-jernej.skrabec@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Ezequiel. Dne ponedeljek, 11. julij 2022 ob 23:31:11 CEST je Ezequiel Garcia napisal(a): > On Mon, Jun 20, 2022 at 07:55:15PM +0200, Jernej Skrabec wrote: > > Now that we have infrastructure for reporting errors, let's add two > > checks, which will make sure slice can be actually decoded. > > > > Signed-off-by: Jernej Skrabec > > --- > > > > drivers/staging/media/sunxi/cedrus/cedrus_h265.c | 8 ++++++++ > > 1 file changed, 8 insertions(+) > > > > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c > > b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c index > > cfde4ccf6011..99020b9f9ff8 100644 > > --- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c > > +++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c > > Now that you've allowed setup to fail, I would suggest > to have some documentation/comments on struct cedrus_dec_ops, > to set the expectation/rules for each ops, including the > call paths for each operation, which of them are allowed to sleep, > etc. Documentation can be always added, but it should be separate patch. > > > @@ -435,9 +435,17 @@ static int cedrus_h265_setup(struct cedrus_ctx *ctx, > > struct cedrus_run *run)> > > * instead of start of slice data. Padding is 8 bits at most (one bit > > set to 1 and * at most seven bits set to 0), so we have to inspect > > only one byte before slice data. */ > > > > + > > + if (slice_params->data_byte_offset == 0) > > + return -EOPNOTSUPP; > > + > > AFAICS, cedrus_h265_setup is called from .device_run. > We've been discussing control validation before, and I think the > ideal place to do that is v4l2_ctrl_ops.s_ctrl, if that's > at all possible. Yeah, this particular check can be moved to s_ctrl handler. > > Driver's mem2mem device_run are executed in the context > of a work_struct and the failure won't really get reported > up the stack. Well, at least there will be a notice in dmesg. Not ideal, I know. > > > padding = (u8 *)vb2_plane_vaddr(&run->src->vb2_buf, 0) + > > > > slice_params->data_byte_offset - 1; > > > > + /* at least one bit must be set in that byte */ > > + if (*padding == 0) > > + return -EINVAL; > > + > > Maybe this is something to check at cedrus_buf_prepare(), > when the buffer is queued? I don't think so. This check is HEVC specific, but cedrus_buf_prepare() is not and we need to have slice control ready, which I'm not sure is the case for cedrus_buf_prepare(). Best regards, Jernej > > Thanks, > Ezequiel > > > for (count = 0; count < 8; count++) > > > > if (*padding & (1 << count)) > > > > break; > > > > -- > > 2.36.1