From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752796AbdCEApO convert rfc822-to-8bit (ORCPT ); Sat, 4 Mar 2017 19:45:14 -0500 Received: from gloria.sntech.de ([95.129.55.99]:54884 "EHLO gloria.sntech.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752542AbdCEApM (ORCPT ); Sat, 4 Mar 2017 19:45:12 -0500 From: Heiko Stuebner To: James Hogan Cc: Andy Shevchenko , linux-kernel@vger.kernel.org, Greg Kroah-Hartman , Andy Shevchenko , Jason Uy , Kefeng Wang , David Daney , Russell King , linux-serial@vger.kernel.org, linux-clk@vger.kernel.org, linux-mips@linux-mips.org, bcm-kernel-feedback-list@broadcom.com Subject: Re: [PATCH] serial: 8250_dw: Fix breakage when HAVE_CLK=n Date: Sun, 05 Mar 2017 01:44:33 +0100 Message-ID: <3772321.GSmxWtfp6p@phil> User-Agent: KMail/5.2.3 (Linux/4.9.0-1-amd64; KDE/5.27.0; x86_64; ; ) In-Reply-To: <20170304130958.23655-1-james.hogan@imgtec.com> References: <20170304130958.23655-1-james.hogan@imgtec.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8BIT Content-Type: text/plain; charset="iso-8859-1" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Am Samstag, 4. März 2017, 13:09:58 CET schrieb James Hogan: > Commit 6a171b299379 ("serial: 8250_dw: Allow hardware flow control to be > used") recently broke the 8250_dw driver on platforms which don't select > HAVE_CLK, as dw8250_set_termios() gets confused by the behaviour of the > fallback HAVE_CLK=n clock API in linux/clk.h which pretends everything > is fine but returns (valid) NULL clocks and 0 HZ clock rates. > > That 0 rate is written into the uartclk resulting in a crash at boot, > e.g. on Cavium Octeon III based UTM-8 we get something like this: > > 1180000000800.serial: ttyS0 at MMIO 0x1180000000800 (irq = 41, base_baud = > 25000000) is a OCTEON ------------[ cut here ]------------ > WARNING: CPU: 2 PID: 1 at drivers/tty/serial/serial_core.c:441 > uart_get_baud_rate+0xfc/0x1f0 ... > Call Trace: > ... > [] uart_get_baud_rate+0xfc/0x1f0 > [] serial8250_do_set_termios+0xb0/0x440 > [] uart_set_options+0xe8/0x190 > [] serial8250_console_setup+0x84/0x158 > [] univ8250_console_setup+0x54/0x70 > [] register_console+0x1c8/0x418 > [] uart_add_one_port+0x434/0x4b0 > [] serial8250_register_8250_port+0x2d8/0x440 > [] dw8250_probe+0x388/0x5e8 > ... > > The clock API is defined such that NULL is a valid clock handle so it > wouldn't be right to check explicitly for NULL. Instead treat a > clk_round_rate() return value of 0 as an error which prevents uartclk > being overwritten. > > Fixes: 6a171b299379 ("serial: 8250_dw: Allow hardware flow control to be > used") Signed-off-by: James Hogan > Cc: Greg Kroah-Hartman > Cc: Andy Shevchenko > Cc: Jason Uy > Cc: Kefeng Wang > Cc: Heiko Stuebner > Cc: David Daney > Cc: Russell King > Cc: linux-serial@vger.kernel.org > Cc: linux-clk@vger.kernel.org > Cc: linux-mips@linux-mips.org > Cc: bcm-kernel-feedback-list@broadcom.com > --- > drivers/tty/serial/8250/8250_dw.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/tty/serial/8250/8250_dw.c > b/drivers/tty/serial/8250/8250_dw.c index 223ac234ddb2..e65808c482f1 100644 > --- a/drivers/tty/serial/8250/8250_dw.c > +++ b/drivers/tty/serial/8250/8250_dw.c > @@ -267,6 +267,8 @@ static void dw8250_set_termios(struct uart_port *p, > struct ktermios *termios, rate = clk_round_rate(d->clk, baud * 16); > if (rate < 0) > ret = rate; > + else if (rate == 0) > + ret = -ENOENT; > else > ret = clk_set_rate(d->clk, rate); > clk_prepare_enable(d->clk); Looks good Reviewed-by: Heiko Stuebner