From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5C75AC28CC0 for ; Wed, 29 May 2019 11:23:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3867121019 for ; Wed, 29 May 2019 11:23:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726581AbfE2LXf (ORCPT ); Wed, 29 May 2019 07:23:35 -0400 Received: from relay.sw.ru ([185.231.240.75]:48952 "EHLO relay.sw.ru" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725894AbfE2LXf (ORCPT ); Wed, 29 May 2019 07:23:35 -0400 Received: from [172.16.25.12] by relay.sw.ru with esmtp (Exim 4.91) (envelope-from ) id 1hVwg1-00037i-FP; Wed, 29 May 2019 14:23:25 +0300 Subject: Re: [PATCH 3/3] asm-generic, x86: Add bitops instrumentation for KASAN To: Dmitry Vyukov , Peter Zijlstra Cc: Marco Elver , Mark Rutland , Alexander Potapenko , Andrey Konovalov , Jonathan Corbet , Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , the arch/x86 maintainers , Arnd Bergmann , Josh Poimboeuf , "open list:DOCUMENTATION" , LKML , linux-arch , kasan-dev References: <20190528163258.260144-1-elver@google.com> <20190528163258.260144-3-elver@google.com> <20190528165036.GC28492@lakrids.cambridge.arm.com> <20190529100116.GM2623@hirez.programming.kicks-ass.net> <20190529103010.GP2623@hirez.programming.kicks-ass.net> From: Andrey Ryabinin Message-ID: <377465ba-3b31-31e7-0f9d-e0a5ab911ca4@virtuozzo.com> Date: Wed, 29 May 2019 14:23:40 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.7.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 5/29/19 1:57 PM, Dmitry Vyukov wrote: > On Wed, May 29, 2019 at 12:30 PM Peter Zijlstra wrote: >> >> On Wed, May 29, 2019 at 12:16:31PM +0200, Marco Elver wrote: >>> On Wed, 29 May 2019 at 12:01, Peter Zijlstra wrote: >>>> >>>> On Wed, May 29, 2019 at 11:20:17AM +0200, Marco Elver wrote: >>>>> For the default, we decided to err on the conservative side for now, >>>>> since it seems that e.g. x86 operates only on the byte the bit is on. >>>> >>>> This is not correct, see for instance set_bit(): >>>> >>>> static __always_inline void >>>> set_bit(long nr, volatile unsigned long *addr) >>>> { >>>> if (IS_IMMEDIATE(nr)) { >>>> asm volatile(LOCK_PREFIX "orb %1,%0" >>>> : CONST_MASK_ADDR(nr, addr) >>>> : "iq" ((u8)CONST_MASK(nr)) >>>> : "memory"); >>>> } else { >>>> asm volatile(LOCK_PREFIX __ASM_SIZE(bts) " %1,%0" >>>> : : RLONG_ADDR(addr), "Ir" (nr) : "memory"); >>>> } >>>> } >>>> >>>> That results in: >>>> >>>> LOCK BTSQ nr, (addr) >>>> >>>> when @nr is not an immediate. >>> >>> Thanks for the clarification. Given that arm64 already instruments >>> bitops access to whole words, and x86 may also do so for some bitops, >>> it seems fine to instrument word-sized accesses by default. Is that >>> reasonable? >> >> Eminently -- the API is defined such; for bonus points KASAN should also >> do alignment checks on atomic ops. Future hardware will #AC on unaligned >> [*] LOCK prefix instructions. >> >> (*) not entirely accurate, it will only trap when crossing a line. >> https://lkml.kernel.org/r/1556134382-58814-1-git-send-email-fenghua.yu@intel.com > > Interesting. Does an address passed to bitops also should be aligned, > or alignment is supposed to be handled by bitops themselves? > It should be aligned. This even documented in Documentation/core-api/atomic_ops.rst: Native atomic bit operations are defined to operate on objects aligned to the size of an "unsigned long" C data type, and are least of that size. The endianness of the bits within each "unsigned long" are the native endianness of the cpu. > This probably should be done as a separate config as not related to > KASAN per se. But obviously via the same > {atomicops,bitops}-instrumented.h hooks which will make it > significantly easier. > Agreed.